Hi everyone, I agree with Steven's point that DMA should be controlled and call out by a third party. So now the PCI board is the first party , the physical memory is the second party. Should the third party be some other hardware on the motherboard( is there anything like PCI controller?) that perform the DMA? So is it false in saying that add DMA on the PCI board? at least the PCI board can initiate a read/write with specific command telling the motherboard that " I would like to talk to Main memory directly" . The PCI bus can only know what the PCI board want through those Address and signal lines. Note: the memory my PCI board want to talk with is the main memory on the PC, not the memory on any PCI device. Can any body make it clear for me? Regards, TOM _______________________________________________ http://www.opencores.org/mailman/listinfo/cores

On Wed, 2003-12-10 at 06:14, tomko81 at h... wrote:
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Host Processor/Memory---PCI Bus/DMA Controller------PCI Device 1 | |---PCI Device 2 | ----PCI Device N In the diagram above, note that the PCI board you are referring to is considered to be one of the PCI Devices. As you have stated, DMA is always a burst mode transaction between host memory and one of the PCI Devices. You have indicated that you are using a third-party computer and PCI bus, and that you are developing a PCI peripheral device controller, which makes this a lot easier. The DMA controller is a component of the PCI bus controller on the host processor board. It is controlled entirely from the host processor. No device on the PCI bus, including the Host Master, can initiate DMA activity independently. DMA transactions are always initiated by the Host Processor under software control. For output, flow of control works like this: 1. The host processor allocates real memory, locks it, and fills it with data to be written. 2. The host processor programs the DMA controller with the target device address, the real memory buffer address, and the length of the transfer. 3. The host processor sets the DMA control register to start the transfer, then goes about it's other business. 4. The DMA controller requests the PCI bus and begins transferring bursts of data to the target device. The device controller either buffers this data in its own memory, or passes it to the final destination in real time. 5. When all data has been transferred, the DMA controller issues an interrupt to the Host Processor, which becomes aware that the DMA channel is available. For input, flow of control is similar: 1. The device controller receives a block of data from its device. Since we are planning to use DMA, these data are buffered in the controller's internal memory. 1a. At some point, usually when the first byte (or block, for block devices) is received, the device controller issues an interrupt through the PCI bus. 2. The Host Processor responds to the interrupt and reads the size and I/O device space address of the incoming data buffer. It allocates and locks local real memory to receive the data. 3. The Host Processor programs the DMA controller with the address of the device buffer from which to read the data, the local buffer where it should be deposited, and the number of bytes to be transferred. It sets the DMA control register to begin operations. 4. The DMA controller negotiates for the PCI bus and begins burst mode data transfers from the device to Host memory. When all data have been transferred, the DMA controller issues an interrupt to the Host Processor to indicate that the transfer is complete and the DMA channel is free. As you can see, the PCI device attached to the bus does not worry about DMA. It simply needs to support burst mode PCI transactions in slave mode. All DMA transactions are initiated by software in the device drivers on your host processor. Special system calls used primarily by device drivers provide real addresses for use with the I/O subsystem, so the virtual/real translation problem is avoided. Hope this cleared something up for you. Steven R. McQueen srmcqueen at m...

Do modern motherboard implement the DMA controller on the North
bridge PCI bus?