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random integer - VHDL
by Unknown on Apr 20, 2004 |
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hello, ive been searching around awhile now to no avail. I'm looking for
some way in vhdl to generate a random integer or sequence. It doesnt have to be anything fancy at all, just some way to even generate a pseudo random integer would work. i would appreciate any help or suggestions, thanks! |
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random integer - VHDL
by Unknown on May 3, 2004 |
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Some alternatives:
worst pseudo random: check lfsr (linear feedback shift registers:
simple, but really not very random.)
Xilinx has some application notes about that chec their support site -
the idea is to create a 200 or so bit lfsr, and use 8 bits as the output
much better: md5 or sha1 based pseudo random: check the crypto sites for
sha1 pseudo random generators
( fips 186-2 should also tell you how to do this - it's simple if you
got a hashing function, openssl.org also has an implementation in C)
otherswise for real strong randomnes, there are some papers out form
intel and others. Those generators
require good entropy , and thats not easy (you get one or two bits out
of the timing between keystrokes an
operator does on a keyboard ;-( )
thilo
awciesla at uiuc.edu wrote:
hello, ive been searching around awhile now to no avail. I'm looking for
some way in vhdl to generate a random integer or sequence. It doesnt
have to be anything fancy at all, just some way to even generate a
pseudo random integer would work. i would appreciate any help or
suggestions, thanks!
_______________________________________________
http://www.opencores.org/mailman/listinfo/cores
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random integer - VHDL
by Unknown on May 4, 2004 |
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One quite good random generator is to use a CAN on a thermal diode sensor and
use the lsb of the result as a seed for pseudo-random generator. This use the thermal noise of the diode that should be very unpredictive. Le Lundi 3 Mai 2004 12:50, Thilo Jeremias a écrit :
Some alternatives:
worst pseudo random: check lfsr (linear feedback shift registers:
simple, but really not very random.)
Xilinx has some application notes about that chec their support site -
the idea is to create a 200 or so bit lfsr, and use 8 bits as the output
much better: md5 or sha1 based pseudo random: check the crypto sites for
sha1 pseudo random generators
( fips 186-2 should also tell you how to do this - it's simple if you
got a hashing function, openssl.org also has an implementation in C)
otherswise for real strong randomnes, there are some papers out form
intel and others. Those generators
require good entropy , and thats not easy (you get one or two bits out
of the timing between keystrokes an
operator does on a keyboard ;-( )
thilo
awciesla at uiuc.edu wrote:
>hello, ive been searching around awhile now to no avail. I'm looking for
>some way in vhdl to generate a random integer or sequence. It doesnt
>have to be anything fancy at all, just some way to even generate a
>pseudo random integer would work. i would appreciate any help or
>suggestions, thanks!
>_______________________________________________
>http://www.opencores.org/mailman/listinfo/cores
_______________________________________________
http://www.opencores.org/mailman/listinfo/cores
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random integer - VHDL
by Unknown on May 5, 2004 |
Not available! | ||
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Something that was already discussed in this list about two or three months
ago is XORing two clocks with different frequencies, or the same clock using two different routings. The jitter on these clocks will give you some randomness. Erez. |
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random integer - VHDL
by Unknown on May 5, 2004 |
Not available! | ||
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Hi, I don't have idea how to make random generator in VHDL, but all method based on "random" voltage (thermal measurement diode) or "random" time (jitter), have same problem vith non-random noise based on poor filtered and regulated power supply, and more other sources in real environment. This noise exist in all real applications, and pseudo-random generators is still best solution. Best regards, -boggy Erez Birenzwig wrote:
Something that was already discussed in this list about two or three months
ago
is XORing two clocks with different frequencies, or the same clock using two
different routings.
The jitter on these clocks will give you some randomness.
Erez.
_______________________________________________
http://www.opencores.org/mailman/listinfo/cores
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random integer - VHDL
by Unknown on May 5, 2004 |
Not available! | ||
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I asked a similar question on another forum not too long ago and got a
pretty good response. The response is copied below, - Kingsley Oteng ---------------------------------------------------------------------------- -------------------- VHDL has an excellent built-in random number generator, if you count the IEEE.math_real package as "built-in". It's called UNIFORM. You need to keep two seed values (of type POSITIVE) on its behalf. Every time you invoke it, it updates your seed values and gives you a random REAL value in the range 0 to (not quite) 1.0. You can then massage this REAL value any way you want to get your random bit pattern or whatever. library ieee; use ieee.math_real.all; -- for UNIFORM, TRUNC use ieee.numeric_std.all; -- for TO_UNSIGNED .... process -- Seed values for random generator variable seed1, seed2: positive; -- Random real-number value in range 0 to 1.0 variable rand: real; -- Random integer value in range 0..4095 variable int_rand: integer; -- Random 12-bit stimulus variable stim: std_logic_vector(11 downto 0); begin -- initialise seed1, seed2 if you want - -- otherwise they're initialised to 1 by default loop -- testbench stimulus loop? UNIFORM(seed1, seed2, rand); -- get a 12-bit random value... -- 1. rescale to 0..(nearly)4096, find integer part int_rand := INTEGER(TRUNC(rand*4096.0)); -- 2. convert to std_logic_vector stim := std_logic_vector(to_unsigned(int_rand, stim'LENGTH)); ... Modify according to taste. -- Jonathan Bromley, Consultant |
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random integer - VHDL
by Unknown on May 5, 2004 |
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Hi.
Bogic Petrovic wrote: Hi, I don't have idea how to make random generator in VHDL, but all method based on "random" voltage (thermal measurement diode) or "random" time (jitter), have same problem vith non-random noise based on poor filtered and regulated power supply, and more other sources in real environment. This noise exist in all real applications, and pseudo-random generators is still best solution. Best regards, A common misconception is that non-random noise cannot be removed from a partially random signal to produce a truely random signal. I've proven this in hardware, and mathematically. All you have to do is xor a bunch of bits from the noise source (such as a diode), and the longer you wait, the more random the xor-ed sum will be. In fact, you don't want to throw away the upper bits from the noise source. If there's any true randomness in them at all, they can only help improve the randomness of the xor-ed sum. I generated an entire CD (600 megabytes) of random numbers this way, and passed the DieHard tests. In fact, I had so much data, I was able to run it 60 times. The method I used was to take zener diode noise, amplify it, and run it through a 40MHz 8-bit A/D converter. I took the output and xor-ed the bits into an 8-bit shifter register that rotated the bits on every clock cycle. After about 80 samples, I'd read the data out. With a scope, I could see that the noise source had significant noise well into the range where my scope couldn't keep up anymore, so there's a lot of true random data there. Here's my attempt to describe how xoring many semi-random bits to generate one highly random bit works: Two semi-random bits b1 and b2 each contain small amounts of non-random noise which we can call d1 and d2. Note that d1 and d2 can be correlated, and usually are. The notation P(expression) means the probability that the expression will be 1. I define P(b1) and P(b2) as: P(b1) = 0.5 + d1 P(b2) = 0.5 + d2 To simplify calculations, let's use the maximum, d = max(d1, d2) in the following. Xoring b1 and b2 together gives: P(b1 ^ b2) = P(b1 & !b2) + P(!b1 & b2) = P(b1)*P(!b2) + P(!b1)*P(b2) = (0.5 + d)*(0.5 - d) + (0.5 - d)*(0.5 + d) = 0.25 - 0.5*d + 0.5*d - d*d + 0.25 + 0.5*d - 0.5*d - d*d = 0.5 - 2*d^2 Squaring a small number makes it very small indeed. If d1 and d2 are already noise level amount of non-random noise defined as n(bits) given the number of bits in the xor sum: n(1) = d n(2) = 2*n(1)^2 = 2*d^2 n(4) = 2*n(2)^2 = 2*(2*d^2)^2 = 2^3*d^4 n(8) = 2*n(4)^2 = 2*(2^3*d^4)^2 = 2^7*d^8 ... n(i) = 2^(i-1)*d^i = .5*2^i*d^i = .5*(2*d)^i Here's how you can use this equation. Lets say you believe you have non-random noise levels of no more than d. You want the noise level to be less than N. We want to compute the number of bits needed, i: N = n(i) = .5*(2*d)^i 2*N = (2*d)^i log(2*N) = i*log(2*d) i = log(2*N)/log(2*d) So, for example, if you feel your non-randomness per bit is less than 10%, but you need less than 1 part per billion, we compute the number of bits needed in the xor-sum: i = log(2*10^-9)/log(2*.1) = 12.5 In other words, just xor together at least 13 bits, and you should be in good shape. I've still got copies of the random data I generated, if there are doubters out there who would like to test it. Bill |
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random integer - VHDL
by Unknown on May 5, 2004 |
Not available! | ||
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Hi Bill,
You are right. But, a common misconception is also to use analog noise generators expecting theoretical behavior. XORing is processing method, and analog noise is, in this case, very good starting point for pseudo-random generator source. All pseudo random generators have the same problem... how to choose first "random" number and make "more random" number? Finally, analog noise and good processing method combination is something else. Best regards -boggy Bill Cox wrote:
Hi.
Bogic Petrovic wrote: Hi, I don't have idea how to make random generator in VHDL, but all method based on "random" voltage (thermal measurement diode) or "random" time (jitter), have same problem vith non-random noise based on poor filtered and regulated power supply, and more other sources in real environment. This noise exist in all real applications, and pseudo-random generators is still best solution. Best regards, |
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random integer - VHDL
by Unknown on Nov 20, 2005 |
Not available! | ||
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Hi-
I read your discussion with interest. I am charged with generating
random signals for testing seismometers in the frequency span 1mHz to
50Hz.
Question 1: Is it possible to simply lower the spectrum of the
generated- noise by lowering the clock frequency?
Question 2: What is the "diehard" test? I am searching for a method of
testing random signals or the underlying numbers. I have read that a
good archiving file compressor will give a qualitative measure of
randomness based on the degree of compression achieved. Is this
accurate?
(A friend of mine wrote a program to win at one of the Las Vegas
games, and based on his results drove to Vegas and lost his money. He
discovered that the fly in the ointment was allowing his PC to generate
the random numbers for the game simulation, without any checking.)
-Charles
NonDigital at gmail.com
----- Original Message -----
From: Bogic Petrovicboggy at e...>
To:
Date: Wed May 5 16:22:44 CEST 2004
Subject: [oc] random integer - VHDL
Hi Bill,
You are right. But, a common misconception is also to use analog noise generators expecting theoretical behavior. XORing is processing method, and analog noise is, in this case, very good starting point for pseudo-random generator source. All pseudo random generators have the same problem... how to choose
first "random" number and make "more random"
number? Finally, analog noise and good processing method combination is something else. Best regards -boggy Bill Cox wrote:
> Hi.
> > Bogic Petrovic wrote: >
>
> Hi, > > I don't have idea how to make random generator in VHDL, but all
> method based on "random" voltage (thermal
measurement diode)
> or "random" time (jitter), have same problem
vith non-random noise
> based on poor filtered and regulated power supply, and
more
> other sources in real environment.
> This noise exist in all real applications, and pseudo-random
> generators is still best solution.
> > > Best regards, > > A common misconception is that non-random noise cannot be removed from
> a partially random signal to produce a truely random signal.
I've
> proven this in hardware, and mathematically.
> > All you have to do is xor a bunch of bits from the noise source (such
> as a diode), and the longer you wait, the more random the
xor-ed sum
> will be. In fact, you don't want to throw away the upper bits
from
> the noise source. If there's any true randomness in them at
all, they
> can only help improve the randomness of the xor-ed sum.
> > I generated an entire CD (600 megabytes) of random numbers this way,
> and passed the DieHard tests. In fact, I had so much data, I
was able
> to run it 60 times.
> > The method I used was to take zener diode noise, amplify it, and run
> it through a 40MHz 8-bit A/D converter. I took the output and
xor-ed
> the bits into an 8-bit shifter register that rotated the bits
on every
> clock cycle. After about 80 samples, I'd read the data out.
With a
> scope, I could see that the noise source had significant noise
well
> into the range where my scope couldn't keep up anymore, so
there's a
> lot of true random data there.
> > Here's my attempt to describe how xoring many semi-random bits to
> generate one highly random bit works:
> > Two semi-random bits b1 and b2 each contain small amounts of > non-random noise which we can call d1 and d2. Note that d1 and d2 can
> be correlated, and usually are. The notation P(expression)
means the
> probability that the expression will be 1.
> > I define P(b1) and P(b2) as: > > P(b1) = 0.5 + d1 > P(b2) = 0.5 + d2 > > To simplify calculations, let's use the maximum, d = max(d1, d2) in
> the following.
> > Xoring b1 and b2 together gives: > > P(b1 ^ b2) = P(b1 & !b2) + P(!b1 & b2) = P(b1)*P(!b2) + P(!b1)*P(b2)
> = (0.5 + d)*(0.5 - d) + (0.5 - d)*(0.5 + d)
> = 0.25 - 0.5*d + 0.5*d - d*d + 0.25 + 0.5*d - 0.5*d - d*d > = 0.5 - 2*d^2 > > Squaring a small number makes it very small indeed. If d1 and d2 are
> already
random bit
> noise level
for the
> amount of non-random noise defined as n(bits) given the number
of bits
> in the xor sum:
> > n(1) = d > n(2) = 2*n(1)^2 = 2*d^2 > n(4) = 2*n(2)^2 = 2*(2*d^2)^2 = 2^3*d^4 > n(8) = 2*n(4)^2 = 2*(2^3*d^4)^2 = 2^7*d^8 > ... > n(i) = 2^(i-1)*d^i = .5*2^i*d^i = .5*(2*d)^i > > Here's how you can use this equation. Lets say you believe you have
> non-random noise levels of no more than d. You want the noise
level
> to be less than N. We want to compute the number of bits
needed, i:
>
> N = n(i) = .5*(2*d)^i > 2*N = (2*d)^i > log(2*N) = i*log(2*d) > i = log(2*N)/log(2*d)
> So, for example, if you feel your non-randomness per bit
is less than > 10%, but you need less than 1 part per billion,
we compute the number > of bits needed in the xor-sum: > >
i = log(2*10^-9)/log(2*.1) = 12.5 > > In other words, just
xor together at least 13 bits, and you should be > in good
shape. > > I've still got copies of the random data I
generated, if there are > doubters out there who would like to
test it. > > Bill > > >
_______________________________________________ >
http://www.opencores.org/mailman/listinfo/cores >
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random integer - VHDL
by Unknown on Nov 20, 2005 |
Not available! | ||
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Hi Charles,
NonDigital at gmail.com wrote:
Hi-
I read your discussion with interest. I am charged with generating random signals for testing seismometers in the frequency span 1mHz to 50Hz. Question 1: Is it possible to simply lower the spectrum of the generated- noise by lowering the clock frequency? I think: yes. But, your lower frequency of your noise is mainly defined with duration of your sequence. Sample rate define maximum frequency, and _also_ duration of sequence if number of samples is constant.
Question 2: What is the "diehard" test? I am searching for a method of
Try (well known) MLS (Maximum Length Sequence) for generating pseudo
random stream...
this method is used in audio/acoustics measurements, for example.
Possibly you can find responses to your questions because MLS is well
analyzed.
Hope this helps,
Best regards
-boggy
BoZo Electronics
http://www.bozoel.com
testing random signals or the underlying numbers. I have read that a good archiving file compressor will give a qualitative measure of randomness based on the degree of compression achieved. Is this accurate? (A friend of mine wrote a program to win at one of the Las Vegas games, and based on his results drove to Vegas and lost his money. He discovered that the fly in the ointment was allowing his PC to generate the random numbers for the game simulation, without any checking.) -Charles |
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random integer - VHDL
by Unknown on Nov 21, 2005 |
Not available! | ||
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NonDigital at gmail.com wrote:
(A friend of mine wrote a program to win at one of the Las Vegas
games, and based on his results drove to Vegas and lost his money. He discovered that the fly in the ointment was allowing his PC to generate the random numbers for the game simulation, without any checking.) I'm sorry, I can't resist this... :) Your friend lost money at Las Vegas because a random number generator, somewhere in his PC, produced numbers which weren't quite 'random'? The reason your friend lost money is a little simpler. He needs some more education, and a reality check. |
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random integer - VHDL
by Unknown on Nov 22, 2005 |
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On Sun, 2005-11-20 at 14:58 +0100, NonDigital at gmail.com wrote:
Question 2: What is the "diehard" test?
See http://en.wikipedia.org/wiki/Diehard_tests
I am searching for a method of
testing random signals or the underlying numbers. I have read that a good archiving file compressor will give a qualitative measure of randomness based on the degree of compression achieved. Is this accurate? A file compressor will be able to detect certain kinds of non-randomness (with different compressors able to detect different kinds of non-randomness), but not all. For example, I would expect that a file of a million random decimal digits would compress about as well as a file of the first million decimal digits of pi, even though the former is random and the latter is not. Carl Witty |
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