![no use](https://cdn.opencores.org/img/pils_lt.png)
![no use](https://cdn.opencores.org/img/pil_lt.png)
![no use](https://cdn.opencores.org/img/pil_rt.png)
![no use](https://cdn.opencores.org/img/pils_rt.png)
a question on buses
by Unknown on Apr 29, 2004 |
Not available! | ||
Hi,
I am curious about whether current on-chip buses are buffered. In case of multiple drivers, the buffers seem to be much more complex than just inverters. Suppose two drivers are connected to a bus at point A and B. It seems problematic to just put inverters as buffers in between. Thanks, |
![no use](https://cdn.opencores.org/img/pils_lt.png)
![no use](https://cdn.opencores.org/img/pil_lt.png)
![no use](https://cdn.opencores.org/img/pil_rt.png)
![no use](https://cdn.opencores.org/img/pils_rt.png)