One of the reasons free software is important is so that you can
control your computer and make sure you know what it does.
It's not enough to be able to see what someone claims is the
source code for the program you are using. To trust it, you have
to be able to compile it yourself.

As hardware becomes more complex, the same issue may arise: how do you
know what you hardware really does? Free hardware designs could be
part of the solution, but we can't all afford fab lines, so could
we really solve the problem completely?

I wonder if it is possible to verify that someone else's fabrication
line produced your free chip design honestly by using a program to
view the chip using a microscope, follow the lines, and compare them
with the design that you intended to make. Has anyone looked at this
idea?

Dear Richard, I think that your question is very interesting and put in the right moment and on the right place. Very important legal approach is that people should be free to do something and to be free from things, acts and people that may enslave them. However, this includes technology too. Thus, legal acts are instructive and restrictive. Instructive legal acts open space for people instructing them about framework within which what they can do something. Restrictive legal acts are prohibiting something to do. When basic human freedoms are jeopardized restrictive acts begin to dominate the scene. Some vendors rather behave in a restrictive manner informing people rather on penalties than givim them legal framework within which people can be free to handle, adopt or change software. However, GPL is rather instructive, thus opening space for people to be free and hopefully creative. Another legal issue is how we can control whether someone's freedom is abused, violated or not. As far as software is concerned it can be done easily by comparing source code of software packages in text editor. Thus, it is easy to compare them. As far as hardware is concerned we can put some control methods that are applicable in software. Firmware, cores and any software that control or drive fully or partly programmable devices may be easily compared with source of software that is created or used in possible copyright infringement. I am not enough technically skilled to know all methodologies for comparison of chips and other electronic circuits or hardware in general, but if such an control is possible or control devices are easily accessible than it is possible to control does any company or individual violate our design that we gave to people free to use. It may be possible that vendor must be obliged to give to legal entities a copy of suspected design for verification. However, it should be everyones freedom to define his/her design of any hardware as free (free as freedom) and give it to the public. On the other side, protection of freedom should be backed up by substantial facilities (i.e. equipment, experts ...) that may identify violations of designer's freedom and existing legal acts shoud be amended with articles that expertise should be done in order to protect hardware designer to defend his/her freedom. Thus, software tools for comparison of designs or equipment may be very helpful and help designer to defend his freedom to give his/her design to the public. In addition , I think that software will not be fully free as long as hardware is kept far freedom. Manufacturers will try to dominate by closing their firmware thus possibly preventing their hardware to communicate with our software. For that matter, it is very important to fight for free hardware if we would like to live in a world that may be controlled by its citizens. Commercial applications are rather cheap to manufacture, produced in huge quantities and it is question how chips and other electronic circuits may be verified and compared with design that is supposed to be free. Proffesional equipment is expensive, manufactured in smaller series and more programmable and possible it is easier to verify it. However, it may be very much needed that certaing lawyer offices that are committed to such sort of legal issues are equipped with equipment that may be available for such expertise. I think that possible foundations or various NGOs may be dedicated to help designers to defend their freedom. I am planning to be involved in one project on opencores.org in project dedicated to design of PCI audio card and one of reasons why I am willing to be involved is that it is based on FPGA that is easy to defend my freedom and freedom of potential contributors. As far as any agencies whether they may be governmental or non-governmenta are able to protect freedom of people there will be more people that will be willing to practise their freedom. technollogically speaking, there will be more technollogical activities undertaken by people as long as there is possibility to protect their freedom which is much more important than profit of certain companies. This would be an answer to the highly important question in societies that claim to be free. To whom freedom belongs? If it belongs to people than we have to be capable to protect it from any perspective whether it is arts, technology, ethnicity, religion or anything else. However, state and its agencies should be obliged by law and their constitution to create capacities that will protect their citizens to be free. Technological field is part of of our reality too and states should be obliged to be sure that their citizens are free from that perspective too. Best wishes, Vedran Vucic ----- Original Message ----- From: Richard Stallmanrms at g...> To: Date: Sun May 9 00:00:27 CEST 2004 Subject: [oc] One issue about free hardware
do

Welcome!

First to answer your question, I believe that every techology has a way to
verify that:
- FPGAs: you directly load the device with the program; since the structures
are very primitive and simple. Therefore its very unlikely that device will
be able to change such primitive structures.
- structured arrays and ASICs: almost all the today chips contain testvectors
that enables you to verify if the chip was fabricated correctly. The device
can be put in the test circuit, where you can check if it functions
correctly. These testvectors are usually built automatically. I believe that
this test is exactly what you want.

Of course you can also look at the chip die with microscope, but that requires
expensive equipment and usually it destroys the chip.

Even the comercial tools can be formally verified (although with commercial
third party tools) for equality as is the common practice in todays ASIC
flows.

best regards,
Marko


On Sunday 09 May 2004 00:00, Richard Stallman wrote:

Richard, Unfortunately after fabrication, it is not really possible to look at a chip through a microscope and easily determine what it does... this is because the chips are made up of many layers, the top few layers being metal followed by the polysilicon and diffusion layers. It would be between really difficult and impossible to do this visually with a microscope... Instead, a few smart people from HP (and random other companies back a few years ago) determined a way to create test vectors to put into the chip, and output vector that you expect on the output pins of the chip. There was also devices a way to implement special registers into your design at certain positions to help ascertain exactly where an error was occurring. I have some more information about this somewhere in a text book from my 3rd year at university, if anyone would like I can outline some of the ideas and maybe point you to some websites. - Justin -----Original Message----- From: Richard Stallman [mailto:rms at gnu.org] Sent: Sunday, May 09, 2004 8:00 AM To: cores at opencores.org Subject: [oc] One issue about free hardware One of the reasons free software is important is so that you can control your computer and make sure you know what it does. It's not enough to be able to see what someone claims is the source code for the program you are using. To trust it, you have to be able to compile it yourself. As hardware becomes more complex, the same issue may arise: how do you know what you hardware really does? Free hardware designs could be part of the solution, but we can't all afford fab lines, so could we really solve the problem completely? I wonder if it is possible to verify that someone else's fabrication line produced your free chip design honestly by using a program to view the chip using a microscope, follow the lines, and compare them with the design that you intended to make. Has anyone looked at this idea?

Aloha!

Justin Young wrote:
Actually, there are companies that does this for a living. Chipworks is an example. Look at their website for examples of chips that they have analysed as well as some fine examples of chip art they have found during their investigation [1]: http://www.chipworks.com/ Note that the process is extremely elaborated and costly. It is not just looking in a microscope. The reasons are like you Justin writes that there are several layers. Also, today you ususally fill upp the layers with additional material (oxide, metal etc) in order to make the surrface planar enough to add additional layers. But, as Chipworks shows it is quite possible and is being done with the purpose of determine patent infringhments, technology solutions used, cores, special process properties etc. The chips that are hardest to reverse engineer is quite probably anti-fuse FPGAs (for example from Actel and QuickLogic). Determining if a via fuse have been burned or not requires precise meausrements. Also, these vendors adds protections mechanisms that will alter more fuses if tampering is detected, thereby destroying the ability to detect the design. This is the chief reason (IMHO) these devices are popular in high-security and military applications. Also, note that test pattern verification might be hard to do if those pins are disabled after production/packaging have been completed. In short: I think Stallman has a valid point that it would be interesting/good to have a way to determine if someone uses FOSS cores in their designs without acknowleding doing so. But, practically it is very hard to do so. It is possible, but takes loads of cash. [1] Another place doing thgese kinds of things is Molecular Expressions, which BTW have a nice image of Tux on a die, pretty suitable when talking about Open and Free hardware: http://micro.magnet.fsu.edu/creatures/pages/linuxpenguin.html -- Med vänlig hälsning, Yours Joachim Strömbergson - Alltid i harmonisk svängning. VP, Research & Development ---------------------------------------------------------------------- InformAsic AB / Hugo Grauers gata 5B / SE-411 33 GÖTEBORG / Sweden Tel: +46 31 68 54 90 Fax: +46 31 68 54 91 Mobile: +46 733 75 97 02 E-mail: joachim.strombergson at informasic.com Home: www.informasic.com ----------------------------------------------------------------------

A couple of things to keep in mind when thinking about this. One is that the code gets compiled, and that compiled code is different for just about every version of every different compiler out there, so there is, realistically, no way of looking at hardware to determine infringement between source code and hardware. Second, if someone modifies code, to some basic degree, it can then be claimed to be their code. People have done this successfully with service manuals, where they simply took a copyrighted manual, added notes in the margins, and registered it as a new "work". If there is valid reason to believe there is copyright violation, it is expensive to prosecute...and you can compel the other company to turn over all the pertinent documentation to an intermediary for them to review. You can't review it your self, as it may very well be that there is proprietary information that you have no business seeing, contained within what you receive. You have to pay for this person's time, typically. I would say the minimum cost for such, between legal fees and expert fees, would be around $20k. But, if there is violation, and you either settle out of court, or the courts find in your favor, all your fees should be covered. Regards, Austin Franklin austin at darkroom.com

On Saturday 08 May 2004 05:00 pm, Richard Stallman wrote:
The bigger problem is the complete lack of an open-source flow from RTL to implementation. There is simply no GCC equivalent for compiling digital logic -- every ASIC and FPGA designer is at the mercy of commercial tools on the font-end. (My biggest pet-peeve is FPGA synthesis. FPGAs have had dual-port RAMs for ~7 years now, yet we still can't infer dual-port block RAM from HDL. Arggh!) One hurdle to open-source synthesis and place&route is proprietary architectures. The major FPGA vendors refuse to disclose the underlying details needed to for a quality PAR tool or physical synthesis. But oddly enough the biggest roadblock to open-source EDA is ourselves. For some reason or another, there is an apparent lack of interest and motivation. Just a few examples: 1. Every couple of months the topic of open-source tools arise. Generates quite a bit of discussion, then dies as quickly as it started. http://www.opencores.org/forums.cgi/cores/2003/09/00014 http://archives.seul.org/geda/dev/Nov-2003/msg00012.html This thread started 4 days ago, and sums up the view of open-source in EDA. :-( http://groups.google.com/groups?q=comp.arch.fpga+status+open+source+tools 2. With Confluence under GPL, I have yet to receive a single bug report or source code contribution. http://www.eedesign.com/news/showArticle.jhtml;jsessionid=TIARDDA1PTO1CQSNDBGCKHY?articleId=18402723 3. Icarus Verilog, the foremost open-source Verilog implementation, still only has one active developer. http://www.icarus.com/eda/verilog/ 4. The only semi-successful FPGA packing, placement, and routing project haulted activity in March, 2000. http://www.eecg.toronto.edu/%7Evaughn/vpr/vpr.html 5. The one person who came the closest to reverse engineering the Virtex bit stream -- the critical step for physical synthesis -- became frustrated with the lack of support and interest from the FPGA community, and finally closed shop on 12/24/2003. Merry Christmas. http://neil.franklin.ch/Projects/VirtexTools/Logfile What can we do to improve open-source EDA? Regards, Tom -- Tom Hawkins Launchbird Design Systems, Inc. Home of the Confluence Logic Design Language http://www.launchbird.com/

Hi,

I agree with all your positions in this discussion. IMHO, possibly, open cores don't make real migration to "general purpose" programming community. All listed open core projects tend to be strictly embedded (communications cores is also embedded) Yes, we have embedded programming community, but, this community will not ever try to build an successfull CAD program for schematic capture... or I'm wrong? Whether hardware designers or embedded programers need help, or "general purpose" programmers need help (for help)? Possibly some migration of this two "worlds" may help. Possibly we can design free (like freedom) hardware personal computer FPGA based board for it... or wait an hardware company to make this decision... :) (I already started one, please visit mafa-pc-board page http://www.opencores.org/projects.cgi/web/mafa-pc-board/overview) With only cores and cheap development boards in opencores.org directory, we will be left alone with our problems... If we successfully put an free (like freedom) PC to programmers desk...? I don't know... Who knows? Best regards, -boggy

The main problem about confluence or NuSMV is that you need to learn a new
language. This a very time consuming task, and you have the problem of the
continuation of the tools.

What we need is a good HDL simulator : ghdl become better each month.

Then a formal checking tools could be great (with HDL as input ! not a
completly obscure new language !) , and a netlist generator then a
place&route tools.

- structured arrays and ASICs: almost all the today chips contain testvectors
that enables you to verify if the chip was fabricated correctly. The device
can be put in the test circuit, where you can check if it functions
correctly. These testvectors are usually built automatically. I believe that
this test is exactly what you want.

I am not completely sure how a testvector works, but I tend to think
it that we are not talking about the same thing, and that a testvector
couldn't detect the kind of problem I am thinking about.

Are testvectors intended to detect mistakes in fabrication?
I would guess so.

I'm imagining that a fabricator could put deliberate modifications
into certain parts of the circuit, to provide a back door or a
surveillance feature. If the back door only activates when a certain
sequence of data passes by, it would have no effect on the results of
your testvector. So you could not detect it using a testvector.

If the testvector is in a specific part of the chip, these changes
would not alter the testvector, because they would be in a different
part of the chip. They would occupy some part of the silicon that you
had not used, perhaps.

Of course you can also look at the chip die with microscope, but
that requires expensive equipment and usually it destroys the
chip.

Once you run the fabrication line, making a few extra chips to test
doesn't cost much more. So you can afford to destroy a few chips from
the batch in order to look at them with the microscope to verify the
fabrication. However, comparing them with a microscope "by hand"
would take lots of time. Hence my suggestion to automate that process
of comparison.

Unfortunately after fabrication, it is not really possible to look at a chip
through a microscope and easily determine what it does... this is because
the chips are made up of many layers, the top few layers being metal
followed by the polysilicon and diffusion layers. It would be between really
difficult and impossible to do this visually with a microscope...

Is there any sort of process that can be used? Reverse engineering of
chips used to be common practice; are there any methods for reverse
engineering today which you could use on your own chips to verify
them?

Dear colleagues, I follow carefully your discussion and I think that we have to clarify some things that are needed to foster more intensive creation of open hardware. Historically, and technically, we need compiler, editor and debugger in order to start writing software. However, at the beginning there was not possible to have all those basic elements free in terms of freedom. Despite the fact that some tools that have been used at the begining have not been free, very important steps have been undertaken. Preconditions for free software were made. Since we have now all necessary tools for writing free software we have to find ways to establish tools for creation of open hardware. We need free core generators, free system modeling software, free verification software and possibly some other tools necessary to design free hardware. However, FPGA and similar chips may be preferred. I would say, even for the beginning we may use something that is not free since some protocol specifications are not free. However, reverse engineering will help in the course of time to replace non-free parts of open hardware with free parts of open hardware. Step by step approach will I hope challenge us to make completely free hardware. It is very important that we have to start to create tools for creation of open hardware as soon as possible, since software cannot be fully free with non-free hardware. Firmware that is in your PC may do something which you would not like very much. Thus, it may be important to create free motherboard that will be fully programmable and enable user to upgrade cores inside FPGAs which will make such a PC faster and faster that is very much contrary to the closed hardware. If you have any comments or suggestions please feel free to post. With best wishes, Vedran Vucic ----- Original Message ----- From: nico at s...nico at s...> To: Date: Mon May 10 17:35:05 CEST 2004 Subject: [oc] One issue about free hardware http://www.eedesign.com/news/showArticle.jhtml;jsessionid=TIARDDA1PTO1CQSNDBGCKHY?articleId=18402723
implementation,

routing

the

--

the FPGA

Richard,



Yes, test vectors cannot effectively detect the deliberate modifications. I
would say it is theorethically impossible (at least in some practical time)
to determine that a given sequence won't start some part of the circuit.
If you are looking at chip as black box, i.e. without microscope, then you
cannot determine anything.



There is however nice benefit. If you are doing standard ASICs, you send the
masks directly to the FAB (not netlist -- circuit description). Since designs
tend to be dense, it is thus very hard to make a sequence detector circuit
without making the huge diferencies to the layout. You have reference mask,
which you sent, therefore all you have to do is compare the masks and the
real die implementation. Moreover it would probably suffice to calculate some
sort of "CRC" to make a check.

Unfortunately most of the new designs use high number of metal layers, e.g.
more than 6, where top or top two are used for power routing -- these metals
are covering your circuit, so you cannot see much with normal microscope.
Labs use all sorts of equipment to observe a die and measure electical
parameters in the die, even while running. There are some universities which
also have such equipment. If the chips can be destroyed, you have probably
more options, for example applying some chemicals which will remove some
layer.

Note that you can check if everything is ok by some indirect methods.


Sure, however my company unfortunately don't posses such equipment, but I know
a lot of companies doing custom ASIC design does. Although not so legal, the
reverse engineering is also common practice.

My opinion is that if you are doing one chip design you can include some
mechanisms which will practiacally ensure the equality. E.g. you make small
islands of logic, which are covered by metal layers, and thus unobservable.
Between these islands you can put just interconnections which you can
visually inspect with "normal" microscope. Of course it would be more
practical to just take some pictures and automaticaly compare with the masks.
Having this islands dense with logic and small, it would be practically not
possible to include more logic for at least long sequence testing.

If you are talking about making a methodology, which would ensure this, and
you have some serious intends with this, we would have to engage in longer
discussion and contact some FABs or even better universities, if they have
such equipment.

best regards,
Marko

Jumping in a bit late here I guess ...


On Tue, 2004-05-11 at 00:54, Richard Stallman wrote:


Yes thats correct. Additional logic could be added and hidden
until explicitly enabled. It would not be detected by test
vectors.



This is virtually impossible to do with a a microscope.
All you would see is the top layer metal. Today processes
have at least 5 metal layers, some a lot more. Besides it
would be impossible to determine the underlying device
structure.
Yes there is equipment that makes some of these tasks
possible, but 1) It's not accessible to the normal mortal
human, 2) still would make it extremely difficult to reverse
the underlying logic.
Remember, the RTL goes through two steps of synthesis:
1) RTL to netlist (gate level); 2) Netlist to physical,
or Gates to transistors.


I think the true question is "What is the purpose of this 'monitoring' ?" Why do we want to add it ? Are you just scared that the gvmt or bigbrother will add something to your design ? Who would allow the gvmt to add these functions ? Who would pay for it ? I think a lot of us are not in the US and would not have to comply with such a request ... Regards, rudi ======================================================== ASICS.ws ::: Solutions for your ASIC/FPGA needs ::: ..............::: FPGAs * Full Custom ICs * IP Cores ::: FREE IP Cores -> http://www.asics.ws/

Please count me out of a discussion about "open-source" EDA. "Open source" is the slogan of a movement that was founded to reject the views of the free software movement, which I support. See http://www.gnu.org/philosophy/free-software-for-freedom.html for more explanation. I have more work than I can handle under the banner of free software, so there is no sense in my diverting effort to activities that fly the banner of "open source".

I totaly agree here with Rudi. In order for someone to add something to the
masks after
they have passed through the layout fracturing, they have to basically
reverse engineer
the entire design unless they get a lot of inside help. This cost a lot of
money and not
everyone can afford to do it. Furthermore such request have already been
tried and failed
in the USA, with encryption ASICs, and any companey that will be cought
doing that
will loose such a big market share that it's not worth the risk.

Last thing from past experience every such thing will eventually be
discovered because of the
scale we're talking about. And if it's not a large scale then no reason to
go for the trouble.
Everyone tries to break ASIC designs for many reasons, some for curiousity,
some for bug finding
and some for reverse engineering, finding hidden logic that can spy on you
is such a gem for
a rival company that I doubt if any one will manage to keep it a secret for
long.

Regards,
Erez.