All: As some of you know I have been working on a high performance (pipelined) z80 implementation - wb_z80. The design document has been posted in CVS (wb_z80/doc/z80_spec.doc). The testbench is complete, and initial testing is underway. (Code is maintained in CVS.) The design should start becoming stable in a matter of weeks. I'm looking for help in the verification effort. Specifically, hazards are not well tested in the present "instruction" test - and I have not thought much about synthesis. (Are free tools available to complete static timing analysis in ANY target technology?) Judging from the visits to the project page, there is a lot of interest in the core itself. Is anyone interested in helping with verification? bj Porcella http://pages.sbcglobal.net/bporcella/ -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.opencores.org/forums.cgi/cores/attachments/20040513/4703b968/attachment.htm