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Help Wanted - VHDL Parser Construction
by Unknown on Jun 23, 2004
Not available!
I have been looking into VHDL as a 'soft' language, my background is embedded software and my experience/knowledge of vhdl is limited but I am familiar with the basics. I would like to begin construction of a vhdl parse tool but I am unable to find any really usefull information on a standard output for a vhdl parser. I have the language reference manual and have the bnf (syntatic description) which would allow me to get as far as tokenising an input file and applying rules but ultimately I should be able to feed the output of the parse into a synthesis tool.. (?) I have found some information refering to vif (vhdl intermediate format) which I believe is proprietry (please correct me if I am wrong) but there must be a standardised interface established ISO,ANSI......GNU? If anyone has any information or pointers I would like to hear from you. Thanks all Ben -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.opencores.org/forums.cgi/cores/attachments/20040623/2a72de11/attachment.htm
Help Wanted - VHDL Parser Construction
by Unknown on Jun 24, 2004
Not available!
I think what you want is a netlist. -----Original Message----- From: cores-bounces at opencores.org on behalf of Hotmail Sent: Wed 6/23/2004 2:13 PM To: cores at opencores.org Cc: Subject: [oc] Help Wanted - VHDL Parser Construction I have been looking into VHDL as a 'soft' language, my background is embedded software and my experience/knowledge of vhdl is limited but I am familiar with the basics. I would like to begin construction of a vhdl parse tool but I am unable to find any really usefull information on a standard output for a vhdl parser. I have the language reference manual and have the bnf (syntatic description) which would allow me to get as far as tokenising an input file and applying rules but ultimately I should be able to feed the output of the parse into a synthesis tool.. (?) I have found some information refering to vif (vhdl intermediate format) which I believe is proprietry (please correct me if I am wrong) but there must be a standardised interface established ISO,ANSI......GNU? If anyone has any information or pointers I would like to hear from you. Thanks all Ben -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/ms-tnef Size: 3040 bytes Desc: not available Url : http://www.opencores.org/forums.cgi/cores/attachments/20040624/7417af22/attachment.bin
Help Wanted - VHDL Parser Construction
by Unknown on Jun 26, 2004
Not available!
You should look at ghdl.free.fr

Regards.

Nicolas Boulay

Le Mercredi 23 Juin 2004 23:13, Hotmail a écrit :
I have been looking into VHDL as a 'soft' language, my background is
embedded software and my experience/knowledge of vhdl is limited but I am
familiar with the basics. I would like to begin construction of a vhdl
parse tool but I am unable to find any really usefull information on a
standard output for a vhdl parser. I have the language reference manual and
have the bnf (syntatic description) which would allow me to get as far as
tokenising an input file and applying rules but ultimately I should be able
to feed the output of the parse into a synthesis tool.. (?) I have found
some information refering to vif (vhdl intermediate format) which I believe
is proprietry (please correct me if I am wrong) but there must be a
standardised interface established ISO,ANSI......GNU? If anyone has any
information or pointers I would like to hear from you.

Thanks all

Ben





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