I've put together a site http://OutputLogic.com that has online tools doing parallel CRC, Scrambler and LFSR Counter generation. Basically, it's a few Perl scripts running on a server that generate a Verilog code.
Since it's not a core per se but rather a core generation tool, I cannot really post it on OpenCores.org. Any ideas about the better ways to share those tools.

I've added two projects to the OpenCores.org: LFSR Counter Generator and Parallel CRC Generator

The applications are written in C and similar to the online version, but generate large LFSR counters and CRCs faster.