Hi,

I want simulate a complete DDS structure using the CORDIC CORE.
Is possible to link directly the DDS phase accumulator out at the CORDIC CORE input?

Thanks

Hi,
I would like to ask if u come across CORDIC base sine and cosine computation? I would like to implement it in Verilog HDL.
So far as I understand, module instantiation is not allowed inside a for loop or always statement. So, if i want to implement a iteration loop, how can I develope the code?
Does all the input and output need to be in signed values?
How do we represent the inputs in binary format? what is the data format used? do we allocate the fractions bits? I am confused with this part. On top of that, for the angle input, say 30 degree, how do we represent it in a 16bits binary?

Thx.
I really look forward for your reply. As I really need help.

Regards,
Jas