hello,

I am working with some older technology in which I need to develop a VME interface to communicate with the backplane. Does anyone have hdl code or design infor on developing the VME interface for a slave controller A16,A24,A32 modes?

The canonical info on the VME bus is found at www.vita.com, you should take a look at their app notes and white papers. You might want to take a look at the tundra universe chip and other asics that were used on commercial VME boards. If you are going to implement your HDL in an FPGA to create a VME slave function, pay attention that the fpga you select has the required i/o drive strength, slew rate and voltage to meet the vme bus specifications.