Hi

I'm using the fpu100 arithmetic core from opencores. This core makes some operations (adders and multiplications, for example) with 32-bit floating point numbers. Now I need to convert the results of the operations to decimal radix-2 format (binary), to set them in the I/O ports connected to a digital-analogic converter.

Please, does anyone have a VHDL core or code to do this? Thanks,

Cristiano

You can normalize the results to your integer range, and extract the integer bits from the mantissa field.

Let's say you have an integer range of 16bits, and have a normalized output of 0.12345678.
You can expose the mantissa by multiplying it by 2**16, then get the integer mantissa bits:

0.12345678 => sign = '0', exponent = '01111011', mantissa = '11111001101011011101001'

0.12345678 * 65536 => 8090.86353408

8090.86353408 => sign = '0', exponent = '10001011', mantissa = '11111001101011011101001'

now, the biased exponent is 139, so it's 139-127 = 12. You take the 12 most significant mantissa bits, and have your integer. Remember that the first mantissa bit is always '1':

'1' & '111110011010' => '1_1111_1001_1010' => X"1F9A", or 8090 in integer decimal.

You can easily write a simple VHDL block for that operation.

Jonny