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Frequency divider
by Unknown on Oct 15, 2004 |
Not available! | ||
Hi
I'm working with the NIOS I and i need to generate a 2.048Mhz digital clock. i cant get the pll's to go bellow 15MHZ. how else can i acurately get 2.048MHz ??? thanks thinus |
Frequency divider
by Unknown on Oct 15, 2004 |
Not available! | ||
Easy question of the day.
Set the DPLL to produce a multiple of 2.048MHz and then divide this clock down to produce the 2.048MHz.
Hi
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I'm working with the NIOS I and i need to generate a 2.048Mhz digital clock. i cant get the pll's to go bellow 15MHZ. how else can i acurately get 2.048MHz ??? thanks thinus |
![no use](https://cdn.opencores.org/img/pils_lt.png)
![no use](https://cdn.opencores.org/img/pil_lt.png)
![no use](https://cdn.opencores.org/img/pil_rt.png)
![no use](https://cdn.opencores.org/img/pils_rt.png)