Hi, I'm pretty new in the vhdl language, and I have a big problem with the sdr sdram controller.

I found some sdr sdram controllers, but, obviously dont match with the memory model I have to use.
I tried to use the"versatil sdram controller" , but it is in verilog, and i dont know how to modify it.
Memory model --> Micron MT48LC4M32B2 (1 Megx32x4 banks) (If I use the Stratix Board)
Memory Model --> PSC A2V64S40CTP-G7 (1 Megx16x4 banks) (If I use the De2 Board)

More details about my proyect.
I could use 2 diferents boards, "De2 educational board" or" Stratix II DSP development board".
I have to Write 50 pictures of 128x128 px,then I have to read 2 pictures, apply an algorithm, and then, I should save that new pic in sdram again. Then, I have to show the new image in a vga monitor. That process is with all the pictures that I have in the sdram.

Thanks.
(Sorry about my english)

Try the yadmc core. The Zet project uses it and runs on a DE1 and IIRC the DE2 uses the same SDRAM chip(s).