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UART16550 core
by Unknown on Dec 1, 2004 |
Not available! | ||
Carl,
Could I see that VHDL 16550 uart you have. I'm very interested.
thanks -Lee
----- Original Message -----
From: "Carl van Schaik" carl@o...>
To: cores at o...>
Date: Mon, 6 Aug 2001 09:39:58 +0200
Subject: Re: [oc] UART16550 core
Hi Igor Maybe I should just send you the
I will need to clean up my code a bit, add some comments and the
GPL
license first.
I have not tested the UART fully and I'm sure there are still lots
of errors
in my VHDL.
Someone will need to add the Modem control lines part, but that
should
not be too difficult.
I did not change any of the verilog code for the UART16550 on
opencores
though. The verification module should work for both the
style="color:black;background-color:#ff9999">VHDL and
Verilog
implementations?
regards
Carl
> Hi, Carl,
>
> can you tell me what changes you did in the UART. I'm writing
a verification
> module.
> I already started but I don't want to change things you tested already and
> think are
> OK. > > Regards, > Igor >
> -----Original Message-----
> From: owner-cores at o...
[mailto:owner-cores at o...]On
> Behalf Of Carl
van Schaik
> Sent: 01. avgust 2001 7:29
> To: cores at o...
> Subject: Re: [oc] UART16550 core
>
>
> Hi
>
> I checked through the uart16550 code, looks like it needs
a few changes.
> I have writen a
color:#ff9999">VHDL 16550 uart that I was going to post
up along with
> the Verilog version. It is currently working on my board
so at
> least I know
> for sure that part of it works :-) I just need to implement modem control
> lines (or any volunteers?, should be easy) and get around
to posting it.
>
> regards
> Carl
style="color:black;background-color:#A0FFFF">van Schaik
> --
> Embedded Engineer > OpenFuel Pty Ltd. >
> > Hi, Guys and girls (if any).
> > > > I would like to know if anybody tested the UART16550 core so far.
> > If any body implemented the core, run it on a board,
etc...
> >
> > I want to help verifying the core. > > > > Regards, > > Igor > > > > > > > > > |
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