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VHDL 16550 UART
by glacey on Jun 8, 2012 |
glacey
Posts: 1 Joined: May 17, 2012 Last seen: Aug 14, 2014 |
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Hi,
I am a co-op student attempting to port the VHDL 16550 UART core onto a PC104 FPGA. I am fairly new at all of this, but I think I am getting the hang of it. I am testing the UART using both QNX and LINUX serial drivers, and so far transmitting serial data is working perfectly. However, I have had some issues receiving data. In QNX, the sent character will show up, but it is displayed in multiples of anywhere from 0-30 times. In LINUX, the character doesn't show up at all (but it is arriving on Rx according to scope testing). I have played around with the Rx FIFO but no luck as of yet, as I haven't been able to replicate the issue in simulation. It appears that the baud is functioning correctly. Has anyone else encountered this problem, or have any ideas of what might be causing this? Thanks, Griffin |
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