![no use](https://cdn.opencores.org/img/pils_lt.png)
![no use](https://cdn.opencores.org/img/pil_lt.png)
![no use](https://cdn.opencores.org/img/pil_rt.png)
![no use](https://cdn.opencores.org/img/pils_rt.png)
Choosing a Fabrication Process
by Unknown on Jan 12, 2005 |
Not available! | ||
Hi everyone,
I've got a question regarding choosing a fabrication process.. Let us imagine for a moment that there is a fab out there with all possible processes imaginable and is really cheap (a perfect fab).. I'm interested to know what factors should be considered when choosing the process.. - How do we decide if we want to use 0.35 or 0.25 or 0.18 or 0.13 or any other size for that matter?? - Does it matter if a design is fully digital/fully analog/mixed?? - Does power (W) and supply (V) come into the picture?? - Does speed (MHz/GHz) come into the picture?? - How do we decide which foundry/fab to use?? - Any other things to consider?? I'd appreciate any advice I can get.. Also: - Is there any place to get circuit designs/pre-laid out designs like at opencores but for analog/mixed designs?? I'm about to go down the full-custom analogue/mixed path and I'd like to have some idea of what to expect... cheers.. -- with metta, Shawn Tan |
Choosing a Fabrication Process
by Unknown on Jan 12, 2005 |
Not available! | ||
On Wed, 12 Jan 2005 22:03:48 +0000, Shawn Tan Ser Ngiap
shawn.tan at aeste.net> wrote:
Hi everyone,
I've got a question regarding choosing a fabrication process.. Let us imagine for a moment that there is a fab out there with all possible processes imaginable and is really cheap (a perfect fab).. I'm interested to know what factors should be considered when choosing the process.. - How do we decide if we want to use 0.35 or 0.25 or 0.18 or 0.13 or any other size for that matter?? Process is generally chosen on basis of price, so your perfect fab is not a good example. :) Newer generation processes give lower per-unit cost and power consumption, at a cost of higher NRE.
- Does it matter if a design is fully digital/fully analog/mixed??
Yes, but analog is a special case in almost every process... Analog parts are typically fabbed in larger processes that are better characterized and less expensive to fix if you screw up.
- Does power (W) and supply (V) come into the picture??
The max and min voltages go down as your feature size gets smaller, so yes.
- Does speed (MHz/GHz) come into the picture??
Smaller processes are faster.
- How do we decide which foundry/fab to use??
What are your requirements? What skills does your team have? If you haven't fabbed a chip before, you almost certainly want to go with someone who handles your back-end (IBM, Agilent, LSI Logic).
- Any other things to consider??
Depending on how much analog logic you have, consider doing your design in an FPGA and doing an FPGA->ASIC conversion through Orbit or someone similar.
I'm about to go down the full-custom analogue/mixed path and I'd like to have
some idea of what to expect... Honestly, I'm not trying to put a downer on things, but if you're seriously going to design a full-custom chip, you shouldn't be asking these questions. Most of this list is Chip Design 101, and custom analog silicon is the Deep Voodoo of chip design. Good Luck, Guy |
Choosing a Fabrication Process
by Unknown on Jan 13, 2005 |
Not available! | ||
Hi,
Thanks for the quick reply.. On Wednesday 12 January 2005 22:59, Guy Hutchison wrote:
Process is generally chosen on basis of price, so your perfect fab is
per-unit cost and power consumption, at a cost of higher NRE. So, process scaling has *no* effect on the circuit design at all?? I believe that process scaling will affect analog circuits.. Models change..
> - Does it matter if a design is fully digital/fully analog/mixed??
characterized and less expensive to fix if you screw up. Okay.. I understand this.. Use a well understood process with good device models instead of a newer one with weaker models.. Better simulation results, less chance of screwing up and wasting $$$ on a botched run..
> - Does power (W) and supply (V) come into the picture??
The max and min voltages go down as your feature size gets smaller, so yes. Understood..
> - Does speed (MHz/GHz) come into the picture??
Smaller processes are faster. Understood..
> - Any other things to consider??
Depending on how much analog logic you have, consider doing your design in an FPGA and doing an FPGA->ASIC conversion through Orbit or Unfortunately, my design is almost certainly 80%-100% analog... Does anyone happen to know if FPAAs are as useful as FPGAs in circuit development?? I've never used FPAA..
> I'm about to go down the full-custom analogue/mixed path and I'd like to
Honestly, I'm not trying to put a downer on things, but if you're seriously going to design a full-custom chip, you shouldn't be asking Thanks for the advice.. I know that some of my questions were rather basic, cause I was trying to verify some very basic assumptions.. (; And no, it's not a downer.. I know that it's not going to be easy.. Also, anyone know any mailing list I can subscribe to that discusses details of layout and other low level work for analog?? I tried analogvlsi on yahoo but it doesn't seem suitable.. cheers.. -- with metta, Shawn Tan |
Choosing a Fabrication Process
by Unknown on Jan 13, 2005 |
Not available! | ||
On Thu, 13 Jan 2005 00:27:20 +0000, Shawn Tan Ser Ngiap
shawn.tan at aeste.net> wrote:
Hi,
Thanks for the quick reply.. On Wednesday 12 January 2005 22:59, Guy Hutchison wrote:
> Process is generally chosen on basis of price, so your perfect fab is
> per-unit cost and power consumption, at a cost of higher NRE. So, process scaling has *no* effect on the circuit design at all?? I believe that process scaling will affect analog circuits.. Models change.. Process scaling does have effects on the circuit design (speed, power consumption, capacitance, parasitics all change), but the primary reason that people choose one process over another is price and volume. That's another reason that analog circuits tend to be in larger processes; analog circuits are much less complex (in terms of transistor count) than digital designs, and are more likely to be pad-limited instead of core-limited.
Thanks for the advice.. I know that some of my questions were rather basic,
cause I was trying to verify some very basic assumptions.. (; And no, it's not a downer.. I know that it's not going to be easy.. Also, anyone know any mailing list I can subscribe to that discusses details of layout and other low level work for analog?? I tried analogvlsi on yahoo but it doesn't seem suitable.. It's a pretty select bunch of people; I'm not sure how you'd find them. Your best references are probably going to be offline. I would pull down the Alliance package and the Electric HDL tool, and check for mailing lists and documentation references for them. - Guy |
![no use](https://cdn.opencores.org/img/pils_lt.png)
![no use](https://cdn.opencores.org/img/pil_lt.png)
![no use](https://cdn.opencores.org/img/pil_rt.png)
![no use](https://cdn.opencores.org/img/pils_rt.png)