Hello,

I am trying to use the opencores I2c master in my Soc.

I have an LM32, with an Uart and a GPIO interconnected with a 32 bits Whisbone. I have added the I2C master core and I have changed it in order to adapt it to the 32 bits bus (shifting the wb_addr_i 3 bits)
At the moment I can access to the I2c core registers.

I have tried to make a write command following these steps:

1.- Disable the core
2.- set the preescaler to �0xC7� (the WB clock is 100 MHz)
3.- Enable the core
4.- Read the preescaler and write it in the uart: it is correctly set to �0xC7�
5.- Put the data (with write bit) in the txr (i2c0->rxtx = 0xA2;)
6.- Read the status register (i2c0->csr): its value is 0;
7.- Enable STA and WR in the command register (i2c0->csr = 0x90 ;)
8.- Read the status register (i2c0->csr): its value is 2 (TIP flag)
9.- Wait until TIP flag is cleared

And them I am waiting for the eternity. The TIP flag never goes down.

While waiting I am reading the status register (always �0x02� -> TIP enabled ), the txr register (the sixth register � undocumented but containing the txr data -> �0xA2�) and the command register (the seventh register � undocumented but congaing the command register -> �0x90�)

So the command register never is cleared (�done� flag) and the TIP flag never disables.

I am also checking with the oscilloscope the two output wires of the i2c (SDA and SCL) but it never adquires a signal. The two outpus are not connected (Pullup resistors are not used)

Any clue of what to check next?

Thanks in advance

2 real1975
please specify IP core. Is it I2C Master controller made by Richard Herveille ?