Respected sir(s)/ madam(s),

I am a final year student working on a project on FFT. Since my inputs &
twiddle factors require the use of math_real library, I used it & was
succesful in simulating it.

But, can you tell me how I can synthesise my code?

Thanks
Rgds
Rish

rishadh at yahoo.co.uk wrote:

Well, the short answer is that you can't, without also creating
floating-point adders and multipliers, which is much harder than coding
an FFT.

If you really want to synthesise without floating point, then you'll
need to go back to the drawing board and look up integer and block FFTs.
Doing an FFT with integer arithmetic is a difficult problem, because of
the nature of Fourier Transforms: you get very little dynamic range in
integers.

RT

rishadh at yahoo.co.uk escribió: Perhaps you can change a little bit your design, adding a processor and then doing the math operations on it :) -- Técnico Andrés Trapanotto INSTITUTO NACIONAL DE TECNOLOGÍA INDUSTRIAL Centro de Investigación Telecomunicaciones, Electrónica e Informática Teléfono (54 11) 4724 6300 Interno 6362 andres_t at inti.gov.ar ___________________________________________ 0800 444 4004 | www.inti.gov.ar

I'd say adding a processor is going to be harder/slower then trying to get some sort of FPU. What kind of area requirements are you looking at? And did you look at the Verilog FPU core? An altenative is a new VHDL draft standard with synthesizable floating point support. I did not have much luck getting it to work, but a lot of the issues I had were just related to figureing out the tools (this was early in the semester). It was VHDL-FP or FP-VHDL, Google can definitly find it, as would a search of the FPGA and VHDL newsgroups. Mike On Fri, 21 Jan 2005 12:20:01 -0300, Andrés Trapanotto andres_t at inti.gov.ar> wrote: