I started playing around with the spimaster core. I have a bizzare problem where if the code reads the status register in a tight loop, then the machine is hung up there. It seems to never get a non-busy status. Please note this just might be a problem with my processor., but I thought I'd ask if this has comeup before ?

On my system doing the following hangs the machine forever:

spi_init1:
inb r1,SPI_TRANS_STATUS_REG[r3] ; get the status
beqi r1,#SPI_TRANS_BUSY,spi_init1 ; branch back if busy

However if I insert instructions between getting the status and branching,
then my machine works okay.


inb r1,SPI_TRANS_STATUS_REG[r3] ; get the status
mov r2,r1 ; waste a couple of cycles uselessly
mov r1,r2
beqi r1,#SPI_TRANS_BUSY,spi_init1 ; branch back if busy

2 robfinch
what exactly IP core you are using? What system you have in FPGA?