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ddr3 controller with wishbone
by rill_zhen on May 14, 2013 |
rill_zhen
Posts: 15 Joined: Aug 18, 2012 Last seen: Mar 10, 2015 |
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i am Rill.
now i am trying to port the ORPSoC to kintex7(xilinx),i need a ddr3 controller with wishbone interface. any advice or information? thanks a lot. |
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RE: ddr3 controller with wishbone
by kuzmi4 on May 14, 2013 |
kuzmi4
Posts: 45 Joined: Aug 1, 2008 Last seen: Oct 8, 2024 |
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2 rill_zhen
I think fastest way will be Coregen+Wrapper(custom logic), because I have doubts that you can find open-source HDL DDR3 controller /especially with WB IF/. |
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RE: ddr3 controller with wishbone
by rill_zhen on May 15, 2013 |
rill_zhen
Posts: 15 Joined: Aug 18, 2012 Last seen: Mar 10, 2015 |
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okay,i'll try.thank you,kuzmi4.
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RE: ddr3 controller with wishbone
by kuzmi4 on May 15, 2013 |
kuzmi4
Posts: 45 Joined: Aug 1, 2008 Last seen: Oct 8, 2024 |
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2 rill_zhen
Please let me know if you will have some problems - this idea also interesting for me, and I have some plans in nearest future connected with this realization. |
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RE: ddr3 controller with wishbone
by rill_zhen on May 15, 2013 |
rill_zhen
Posts: 15 Joined: Aug 18, 2012 Last seen: Mar 10, 2015 |
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okay.i have generated a ddr3 controller using coregenerator�a xilinx ISE tool�.
now i am thinking how to design the wishbone wrapper,i'll let u know if i have any problems. |
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RE: ddr3 controller with wishbone
by rill_zhen on May 15, 2013 |
rill_zhen
Posts: 15 Joined: Aug 18, 2012 Last seen: Mar 10, 2015 |
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okay.i have generated a ddr3 controller using coregenerator(a xilinx ISE tool).
now i am thinking how to design the wishbone wrapper,i'll let u know if i have any problems. |
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