I fount that 80% of gays here vote to use opensource tools For me ,It's a real new idea. please tell me what opensource sofewate you use for disigning a core(sim, syn ) and sch pcb tool! 　　　　　　　　winglion at 21cn.com 　　　　　　　　　　2005-02-26

For designing a core, that's a hard question. Did you look at the EDA Tools list on the opencores site, http://www.opencores.org/projects.cgi/web/edatools/eda_tools ? I think there is at least one free (beer) simulator, and there is at least one open source simulator, but I'm not sure how they work. From the web site of one I found (after quickly trying a couple of the links) "TyVIS allows you to simulate and execute VHDL code that has been translated into the TyVIS C++ intermediate form." I took a quick look at the manual, but it seems to suggest that using vendor-spefic parts, such as block RAMs, or ASIC multipliers or DSP blocks/slices, *might* be possible but it's not mentioned in the manual (at least it's not in the table of contents). I've never seen an open source synthesis tool, except for one project that's been dead for a long time. Maybe take a look at this: http://www.opencores.org/forums.cgi/cores/2004/05/000757 Honestly, I'm not even aware of a free (beer and legal) version of the tools from either Xilinx or Altera, although they both have a free windows version that includes a special (ie. SLOW) version of ModelSim. I've heard rumors that the next Xilinx release will have a Linux version of Webpack, but even if true, it won't be out until May. However, Webpack dosen't support all of the Xilinx chips and lacks some of the other features of the full Xilinx tools, which do have a current Linux port, but it costs about $2.5k For a PCB Tool, check out gEDA. Mike On Sat, 26 Feb 2005 16:05:07 +0800, 铁石 winglion at 21cn.com> wrote: