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UDP/IP Core
by srijalahiri on Jul 24, 2013 |
srijalahiri
Posts: 1 Joined: Jul 16, 2013 Last seen: Dec 4, 2013 |
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I have downloaded the zip file for implementation of udp/ip core in PC-FPGA communication. I have compiled the vhd files using Xilinx ISE Design Suite and have also configured the fpga with the program. I am using a Spartan 6 LX9 microboard. But when I am running the Java code, I am not getting any packets. How do I initialise the LUT of the transmitter as mentioned in the 'readme' file? Do I have to make changes in the vhdl codes? If so where?
Or do I have to do something else? Please reply fast!!! This is UEGENT!!!
udp_ip__core_latest.tar.gz (177 kb)
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RE: UDP/IP Core
by hemanthk on Aug 26, 2013 |
hemanthk
Posts: 1 Joined: Aug 1, 2013 Last seen: Feb 5, 2014 |
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hi srija, even i'm trying the same. Did u got the flow for "implementation of udp/ip core in PC-FPGA communication". If you are succeeded then please give reply here.
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