Hi guys, (1) I've been going over the amber core's code. I found a bug in the cache controller where one of the c states in the state machine is marked incorrectly. Is there a place I can submit bug fixes for the amber core? (2) I know the core can be simulated using fuse through run.sh, but I've been trying to get the core to simulate in Xilinx ISE, I saw there was no .xise file shipping with the code so I went ahead and created my own, and added all the vlog files. However I faced a couple of issues: (a) include paths had to be made absolute in the .v sources. I know ./run.sh passes -i to the fuse command, but any idea how I can do the same thing on the Xilinx ISE frontend? (b) Even with absolute paths, the next error I'm getting during synthesis is: ERROR:HDLCompiler:1654 - "/home/joel/data/repo/hdl/amber/trunk/hw/vlog/amber23/a23_cache.v" Line 525: Instantiating from unknown module This is the TAG ram which uses the block ram. In the amber sources directory the script ./run.sh works because it may be passing other options to fuse. But from the Xilinx ISE GUI, how can I pass those options for those libraries to resolve the above error? (3) Also I'd like to take the lead on hosting a possible open mailing list, with cgit etc like a typical open source project, where we can discuss various issues related to the amber core, and collaborate on it. Any suggestions, or interest in this? (4) Lastly, unrelated to amber-core.. please make opencores.org forums open, with possible spam filters. The occasional advert. can be deleted. It slows the communication down being moderated. Love this project, the code is very cleanly written looks like a good exercise in tinkering with CPU design. thanks, -Joel