Hi guys:

My group is trying to implement a PC recovery when a signal arises in Amber 23 core. We try to imitate a similar pipeline flush mechanism when a branch is taken. However we checked all the signals which are related to the branch but found no clue to do flush. So is anybody here familiar with the ARM amber 23 core could offer us a clue about how pipeline instruction flush in verilog? We could learn that to implement a PC recovery.

Thanks in advance!

Yumeng