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OCIDE testbench useless???
by Unknown on Mar 30, 2005 |
Not available! | ||
Is there anybody who has successfully used the abovementioned?
I've had no end of problems with it.
Seems it's not testing read-back data from the simulated device
properly. Even though the data comes back ZZZZ all the tests pass.
Would like to hear from anyone who has actually gotten this to work.
Regards,
--
Mark McDougall, Software Engineer
Virtual Logic Pty Ltd, http://www.vl.com.au>
21-25 King St, Rockdale, 2216
Ph: +612-9599-3255 Fax: +612-9599-3266
|
OCIDE testbench useless???
by Unknown on Mar 31, 2005 |
Not available! | ||
Hello Mark,
You might want to look at ata_device.v and make some changes: more specifically at : always @(posedge ata_dior) begin dout = mem[ addr ]; dout_en = 1; end always @(posedge ata_dior) begin dout_en = 0; end This code somewhat gives a problem when simulating in modelsim Changing it to the following might do the trick: always @(posedge ata_dior) begin assign dout = mem[ addr ]; dout_en = 1; end always @(posedge ata_dior_) // begin dout_en = 0; end hope this helps ;-) Tom Tierens Mark McDougall wrote:
Is there anybody who has successfully used the abovementioned?
I've had no end of problems with it. Seems it's not testing read-back data from the simulated device properly. Even though the data comes back ZZZZ all the tests pass. Would like to hear from anyone who has actually gotten this to work. Regards, |
OCIDE testbench useless???
by Unknown on Mar 31, 2005 |
Not available! | ||
Tom Tierens wrote:
always @(posedge ata_dior_) // begin
Yeah, found that one yesterday - thanks!
Although I used (negedge ata_dior)
Regards,
--
Mark McDougall, Software Engineer
Virtual Logic Pty Ltd, http://www.vl.com.au>
21-25 King St, Rockdale, 2216
Ph: +612-9599-3255 Fax: +612-9599-3266
dout_en = 0; end |
OCIDE testbench useless???
by Unknown on Mar 31, 2005 |
Not available! | ||
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Hash: SHA1
Tom Tierens wrote:
| Hello Mark,
|
| You might want to look at ata_device.v and make some changes: more
| specifically at : always @(posedge ata_dior) begin dout = mem[ addr
| ]; dout_en = 1; end
|
| always @(posedge ata_dior) begin dout_en = 0; end
|
| This code somewhat gives a problem when simulating in modelsim
| Changing it to the following might do the trick:
|
| always @(posedge ata_dior) begin assign dout = mem[ addr ]; dout_en
| = 1; end
|
| always @(posedge ata_dior_) //andres_t at inti.gov.ar
___________________________________________
0800 444 4004 | www.inti.gov.ar
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|
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