Hello!
I'm totally newbie in FPGA design and I have some problems with starting doing anything basic.

I try to use ip core found here "16x2 LCD controller" and after changing constraints file to be suitable for me board Spartan-3A rev C and clock period to 20ns for my 50MHz clock - everything went great.
Then when i try to use this controller (outside of demo) with just statically initialized words for lines of data. It looks like not working at all.

My constraints:
#clock
NET "GLOBAL_CLK" LOC = "A11"| IOSTANDARD = LVCMOS33 ;
NET "GLOBAL_CLK" PERIOD = 20.0ns HIGH 40%;
#OUTPUTS
NET "LCD_E" LOC = "AB4" | IOSTANDARD = LVTTL | DRIVE = 4 | SLEW = QUIETIO ;
NET "LCD_RS" LOC = "Y14" | IOSTANDARD = LVTTL | DRIVE = 4 | SLEW = QUIETIO ;
NET "LCD_RW" LOC = "W13" | IOSTANDARD = LVTTL | DRIVE = 4 | SLEW = QUIETIO ;
NET "lcd_db(7)" LOC = "Y15" | IOSTANDARD = LVTTL | DRIVE = 4 | SLEW = QUIETIO ;
NET "lcd_db(6)" LOC = "AB16" | IOSTANDARD = LVTTL | DRIVE = 4 | SLEW = QUIETIO ;
NET "lcd_db(5)" LOC = "Y16" | IOSTANDARD = LVTTL | DRIVE = 4 | SLEW = QUIETIO ;
NET "lcd_db(4)" LOC = "AA12" | IOSTANDARD = LVTTL | DRIVE = 4 | SLEW = QUIETIO ;

and schematic is in the attachments.

If you need some more details please ask me.
Peter