Hello, I am trying to interface an adc(AD9287) to my artix 7 device. Adc gives serial lvds DDR output. I am using iserdes (selectio) module but the only problem is i donot know exact starting time of adc output so there is word framing error. Ä° could not catch the correct 8 bit, rather their shifted version by random amount of bits. Any idea to correct this? Ä°s bitslip function proper for my problem? Thanks.

Is the shift random? means after every power on the amount of shift varying? If no, then the bit slip would solve your problem.
You can put the ADC in test pattern mode and use the bit slip for the getting the correct data.

If you read the data-sheet at the top of page 25, you will see that you need to use 2 extra pins for synchronization.

-------------------------
Two output clocks are provided to assist in capturing data from the AD9287. The DCO is used to clock the output data and is equal to four times the sample clock (CLK) rate. Data is clocked out of the AD9287 and must be captured on the rising and falling edges of the DCO that supports double data rate (DDR) capturing. The FCO is used to signal the start of a new output byte and is equal to the sample clock rate. See the timing diagram shown in Figure 2 for more information.
-------------------------

Good luck
Jean-Paul
AC9GH

Yes the shift is random, after every power up , the amount of shift varies.

OF course I feel that I have to use FCO output but I could not find a way to know the amount of shifts. Then I will use bitslip to solve it. The only solution is SPI interface , isnt it?

Thanks for replies.