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Mr.
by mpop on May 21, 2015 |
mpop
Posts: 1 Joined: May 22, 2011 Last seen: May 13, 2019 |
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Is there any way to make a monostable vibrator in vhdl for Xilinx FPGA, that rely works. Can you post a code pls? Thk!
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RE: Mr.
by hellwig on May 21, 2015 |
hellwig
Posts: 32 Joined: Dec 30, 2007 Last seen: Nov 3, 2024 |
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No code, of course, but here is the idea:
When the trigger arrives, start a counter and set the output to 1. When the counter reaches a predefined value, stop counting and set the output to 0. Here the counter counts up. As an alternative, you can count down instead, from a predefined value to 0. Hellwig |
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RE: Mr.
by dgisselq on May 21, 2015 |
dgisselq
Posts: 247 Joined: Feb 20, 2015 Last seen: Oct 24, 2024 |
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Can you be more specific about what you are looking for?
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