dear all
I have downloaded the I2C controller IP core on the opencores.And I
want to test it to communicate whit the AT24C02(AN eeprom IC).But
now I meet some problems about it. are there anyone had tested it on
the fpga , or used the I2C controller IP in your project?
Anyone can help me?
thanks

weisonglin at eyou.com wrote: I think this core is extensively tested. I have it running on a Spartan II FPGA (XC2S100) communicating to a Microchip 24LC02B EEPROM. The memory have 3.3 V of Vdd and is limiting the communication clock to 367.25 KHz (datasheet says it can reach 400 KHz @ 5 V). Did you simulate it? You can use the provided testbench, I did it to test my system before trying the FPGA (my system have a 16C84 core and a VGA character generator). I used the core with some small changes, but they doesn't affect the I2C side (just the wishbone side). SET -- Salvador Eduardo Tropea (SET). (Electronics Engineer) Visit my home page: http://welcome.to/SetSoft or http://www.geocities.com/SiliconValley/Vista/6552/ Alternative e-mail: set at computer.org set at ieee.org Address: Curapaligue 2124, Caseros, 3 de Febrero Buenos Aires, (1678), ARGENTINA Phone: +(5411) 4759 0013