Hi everyone,
sorry if it is a little off topic. I'm a 25 years old italian electronic engineer, and I want to work in the semiconductor industry, as digital designer (RTL, gate level or physical). I have a strong background in microelectronics, semiconductor devices, solid state physics; very advanced math and science background, that is actually useless here in Italy. In fact, the industry in italy is collapsing. There are no semiconductor industry, I currently work in a shitty consultant society for an automotive customer society that are collapsing too. No innovation and no training at all, boring job and focused on marketing. I'm available to follow a professional in this field, and work for him for free.
So I have to learn by myself about the digital design domain and then try to move outside (my countries targets: UK, Germany, Switzerland, Netherland, Belgium, France) and this seems to be a great place for my scope.
However, I'm look for a project that I can follow from the scratch, and that can be usefull for my scope, so I want to ask you an advice about what project I can contribuite. My companies targets is Intel, AMD, Nvidia, Stmicroelectronics, etc, so maybe the Arithmetic core, the RISC machine and the comunication protocols and bus are a good choice.
Also, I can't find in the projects directory a project that are starting now, but almost all project are done and then have to be validated...

Thank you for your support

Daniele

Wow, what a good question. I'm not sure I have a good answer.

We both know that FPGA/ASIC cores can be built anywhere. Working in this type of business would be ideal for someone stuck in a collapsing economy, such as you describe. Indeed, building the cores someone needs and posting them on OpenCores is the perfect place to start. So let me encourage you there.

You may have noticed that your question has been posted many times and in many ways across this forum [1, 2, 3, 4]. It's not an unusual question.

As for what core, or what type of core, to suggest you work on in order to contribute and (eventually) make a dime from, my answer is probably as simple as you might expect: if I knew that answer, I'd have done it. ;)

That said, take a look at the posts on OpenCores. You'll see people requesting certain cores over time that ... just aren't here. It shouldn't take you too long, browsing through the forums, to find someone asking for help building or using an existing core--whether one that is posted or perhaps one that is not. Many, if not most, of these help requests go unanswered. Sometimes, they even get resurrected after years of inactivity.

You might find those to be a good place to start. For example, do you know of an ARINC 429 Core, or if not, how to build one? Or can you offer examples of how to use the OpenMSP430 core? There's certainly many unanswered questions regarding USB, and not many Network on Chip cache/memory implementations.

With all of these openings, you can pretty much take your pick as to where to start.

Hope this helps,

Dan

Hi Dan, thank you for your answer.
I didn't see all these project unanswered in the forum, I have to look better. Also, in the projects directory I have seen only project that are in advanced state, or at least those projects that interest me.
However, the point isn't strictly what project I have to chose. At my point, wathever project I'll chose, I'll learn a lot for sure. But, due to my zero knowledge about, for example, comunication protocols, algorithm organization in a CPU (or at least only accademic kwnoledge), I can't take a project from the scratch and be the only developer.

Yeah, I tend to filter out all the projects that aren't in advanced states, so ... I tend not to see much other than nearly done projects when browsing the projects directory either.

But you mentioned that there are particular projects that interest you. So, let me ask, what interests you? There's a lot of varied work taking place here. What sort of work are you interested in?

As for not knowing communication protocols, Google is your friend. I've found wonderful diagrams indicating how PS2, SPI, I2C, and even UART protocols work by googling the protocol name and requesting that Google return images.

As for not knowing how to optimize algorithms in a CPU, Google is your friend again (so is wikipedia). There's an amazing wealth of knowledge out there simply to be searched out and studied. For example, one of my projects required implementing a multiply in firmware (FPGA LUTs) without using hardware accelerators. I spent quite a bit of time studying the Wikipedia page for implementing a multiply, as well as Xilinx's page for how to implement one with LUTs. In the end, my solution wasn't wonderful--but it worked.

Dan

Yes, I know internet is a really good source of informations, also I used it multiple time for work and university projects. Happy to hear that even for the projects on OpenCores is possible to find implementation advices on internet. In particual I referred to advanced design rule and techniques, but I thing this is beyond the scope of the site.
Howver, my interest is focused on arithmetic processor (CPU, GPU), and in particular the ultra low power implementation, that involve andvanced techniques of extreme pipeline and/or other architectural solution. I would like to study the implementation for extreme area/performance/power trade-off for these processors, and implement it.

Hi Daniele,

My situation is somewhat similar to yours and I wonder if you would considering to team up, kind of a study group.

I'm a 36 years old electronics engineer from Switzerland, my educational background is focused on micro-controllers, measurement systems, industrial applications, physics and neural networks but i'm stuck in the project management corner.

The FPGA/HDL virus caught me in 2001 but I have not worked professionally on the field yet. I have decided to change this and am self-studying from books, Google and forums like OpenCores on a daily basis to get up to speed.

Maybe you would be open to join forces and collaborate with me in reviving one of the (apparently) abandoned projects. I'm no HDL expert (yet) either but I assume there are many guys (and gals?) around here that would happily help us in specific questions and since we have kind of the same knowledge level we should be able to advance at the same learning speed.

What do you think?

Cheers,
Roland

Hi Roland,

what a wonderful idea! Even I dind't say it explicitly, I would like to consider team up with other people that share my passion towards the digital design world. So for sure we can collaborate for reviving one of the abbandoned project.
Before I read your message, I browsed the projects list and I contacted the author of a project proposal "KSCPU", asking him more information.
Like you, I'm studying by my own, I can suggest you some great book that I've found in these months; the books that I found more interesting don't explain strictly how to code, the rule etc, but the design rule, the logic assumptions, the design choices to obtain the best area/performance/delay, etc.
So we keep in contact in private, if you want.
P.s: I heard switzerland is a lovely place to live and work...whatever the job is. I'm stucked here, and it is terrible painfull. To make all understand, I'm employed since November, but since I'm included in a ending project, from November I write only 10 code line, the rest was only boring documentation, styding the project (that is really simple, however) or - yes, I'm not joking - doing nothing.
I want to work, I want to learn, is the only thing that make me alive when I'm forced to sit in this chair 8 hours a day. So, to make me employable, I have to study and work by my own.

Okay then ... if you are interested in building CPU/GPU types of stuff then you really need to pull up the conference notes from the OpenRISC conferences 1, 2. Despite the name, these conferences focus on much more than just the OpenRISC platform. I've seen discussions of OpenRISC, RISC-V, as well as superscalar, ultrapipelined, and even legal and policy issues.

Second, I'm not sure I've seen much done in the way of ultra low power implementations. I've been trying myself to work on an ultra low area implementation of a 32-bit CPU (see the ZipCPU project), but I'll be the first to acknowledge that others have lower area CPU implementations. But low power? At this point I'm quite curious. Sure you can gate the clock. Is there any other way to get an FPGA based design to fit in a low power profile?

Third, judging from what I've seen at the OpenCores conferences, there's not a lot of work being done on "extreme pipelining". I remember only one implementation presenting work on a multi-issue pipeline, so you may have a fun idea to work on there.

Will you be starting out with a particular piece of hardware in mind, or will you be focusing on logic and using simulation tools?

Dan

[I wrote a previous message, I don't know why isn't approved yet]

Thank you Dan for the resources and for the informations.
Regarding your questions, for sure a lot of things, including clock gating, can be done to create a low-power implementation. I studied these things only in a theoretical way, and I would like to implement these in a real project. These techniques is not banal at all, instead sometimes involve euristich methods so they require knowledge in mat and statistic. However, I will list a few: for example, predictors, that help to keep low the switching activities of some parts when the oputput doesn't change. This technique require a redundancy in the circuit, so sacrify area for the power. An accurate analysis has to be done in order to calculate if the power consumed by the additional circuitry Worth the reduction of the powe consumed by the principal circuitry. Another techniques is the operand isolation, that acts on the redundacy of the datapath, so in the CPU maybe it Worth the effort. Even in this techinque, we have an increase in the area.
Another technique in the RTL design is the optimization of the finite state machine. If we have a finite state machine that switch continuosly between two or more states (high probability states), we can embed these states in one unique state, to avoid the switching activity.
For sure there are other techniques, the ones that I have explained was studied by me only in accademic way.
To answer your last questions, by now I'm interested in the simulation without hardware

Daniele,

I'd like to make a suggestion... I'm assuming that you have no significant background in digital design.

1) Choose a language... VHDL or Verilog... My recommendation, knowing (and using) both, is that you learn VHDL. In the end, you should probably learn both. I started with Verilog, was forced to switch to VHDL, and anytime I have to go back to using Verilog now, I cringe a little. :-)

2) Find yourself a decent little development board. My recommendation is to pick up a something as close to the Digilent Spartan-3E1600 Starter Board as you can. This board isn't really available any longer, but, in my opinion, you want a board with a large enough FPGA that you have a little real estate *and* you want to have a significant number of peripherals available. (e.g. SDRAM, maybe an ADC/DAC, some SPI peripherals, a display, etc) I recommend Xilinx parts, but I'm a little biased (I've used both Xilinx and Altera parts and their associated toolchains, and my bias is formed with a basis in experience, so "grain of salt" and all that, I guess... :-)) Make SURE that your chosen board is either (1) Supported by a free version of the FPGA toolchain -or- (2) includes a restricted license. Affordable boards are available from Digilent... Opal Kelly... I may draw criticism for recommending a Spartan-3 (it's becoming hard to find Spartan-3 parts as the family is largely obsolete), but the Spartan-3 is an easy to understand architecture, with moderate complexity. Looks like Digilent is selling a relatively inexpensive Artix-7 based board (the Nexys-4 DDR board). That might be a good candidate.

3) Download/Install the toolchain... My preference is to stick with Xilinx, and my preference for Xilinx toolchains is ISE. Avoid the complications of dealing with Vivado until you have to. Altera Quartus isn't too bad (I find myself using both ISE and Quartus at the moment), but I find ISE a little easier to use. I recommend developing in a Linux environment and I can tell you specifically that Ubuntu 14.04LTE works just smashingly for FPGA development work.

4) Get yourself a copy of Pong Chu's book "FPGA Prototyping by VHDL Examples". You might do this first... I don't know if the latest edition has a preferred development board. This book will take you through development of increasingly more complex "projects". In the mean time, you'll learn good HDL coding style (which differs substantially from traditional sequential programming language styles), and Chu's book will also take you thorough use of the toolchain and simulator. I *think* he also goes into some detail on the use of things like ChipScope, but I'm not certain about that (and my copy is both dated and packed away in the basement). Also note that Chu has a Verilog version of this book available as well.

5) Set a goal to work through the entire book, and get it done...

6) Learn to use supporting development tools... Doxygen... various open source simulators... etc...

Other references you'll find useful along the way...

1) The RMM (Reuse Methodology Manual). This is a really useful document that will help you understand some of the nuances of HDL development.

2) "HDL Chip Design" by Douglas Smith. This book is getting a little difficult to find, but, in my opinion, it's a valuable reference. It's becoming a little dated, but it still has some REALLY useful info. Others might recommend using it as a tutorial. I don't.

I'd also recommend supplementing your HDL development skills with some background in either signal processing or communication theory. It has been my experience that a combination of an HDL development background with signal processing background (or some other *application* background) is a very useful thing.

I won't try to discourage you from setting your sights on larger scale goals, but I'd suggest that you start by learning some basic RTL development skills. Learning to build good, solid, *synthesizable* HDL first, will save you a LOT of time, and pain, in the future. If you end up working in the field, you'll also make your colleagues much happier... :-) (As someone that has spent some time working with someone else's poorly crafted HDL, it's worth investing some time in learning NOT to write poor HDL...)

Just some thoughts...

Best!

/jw

Dan,

There are absolutely things you can do in addition to clock gating...

Find a copy of the LPMM (Low Power Methodology Manual)... :-) As references go... If you're looking to do low-power design. This is a good place to start...

Best,

/jw

Dan,

There are absolutely things you can do in addition to clock gating...

Find a copy of the LPMM (Low Power Methodology Manual)... :-) As references go... If you're looking to do low-power design. This is a good place to start...

Best,

/jw

I'll speak up for Verilog--I love it. I also love Verilator.

Just for some fun conversation, I'm going to heartily disagree here. Do NOT get a Spartan 3 based board. I have a Spartan 3A based board, and I can't get an ISE license to work with it--it's just too old. I recommend instead getting something you can use with Vivado--hence an Artix 7 based board.

I have had no end of troubles with getting timing to close while using ISE: timing errors will creep in from nowhere based upon some inconsequential change that I have made. Undoing the change doesn't fix the errors. In the end, I often find myself simplifying logic--adding clocks, further expanding pipelines, etc., and doing this to logic that had already worked at the given clock rate before. I have not had any such problems with Vivado.

Now, as for a board, I am also partial to Xilinx. I have also found Digilent's supplies very valuable for me. I would recommend an Artix-7 based board as well, so you can use Vivado. I currently have a Basys-3 development board. I would *not* recommend it for basic CPU-type of work: it has no RAM, so building a CPU that can run any sort of Linux distribution would be difficult. Ideally, you would need something with external memory, a network port, and a video display. If you only wanted the first two (memory+network), I'd suggest the Arty as a place to start. If you also want to get a video display going, then you'll need something more powerful. In particular, you'll want to make certain you not only have a Video output, but also enough RAM that could be used for Video RAM. The Nexys-4-DDR should work, but that's not from experience--I only have the Basys-3 which doesn't even have enough block RAM internal to the FPGA to support a full display.

One final recommendation that I will make is to caution you against spending a lot of money. If you are in a financially tight situation, then I'd like to encourage you to do as much as you can before you spend your first dime. Learn Verilog and use Verilator--I had my entire first design working (video display and all) in a Verilator type simulation before I even bought the hardware it was supposed to work upon. This recommendation has spared me a *lot* of cash over the years.

Oh, another thought for boards: if you are interested in low area, you might consider buying one of the smaller boards that you can fit on. To do this, though, you'll need a simulation to know that your code will work, as well as a build (ISE/Vivado/Quartus) for the respective chip showing that your logic will fit. I'm personally working on the challenge of getting a SoC working on Digilent's CMOD-S6. All I'll say there is that fitting a 32-bit CPU onto a Spartan-6 LX4 was a challenge.

I second this recommendation as well.

Dan

Dan,

Good morning... I used to like Verilog as well, until I was forced to learn VHDL... :-) Going back to Verilog was, in fact, a little painful...

I can't imagine why you'd have trouble getting ISE to work with any of the Spartan-3 family... I use ISE 14.7 (Windows and Linux versions) with both the Spartan-3A and Spartan-3E on a regular basis... We have a product line that uses a picoblaze running on a Spartan-3 to push a bitstream to both -5 and -7 series FPGAs... I have no issues... What are you having trouble with? (Pretty certain I've run into every possible problem with the Spartan-3 and ISE... LOL...)

In the end, my recommendation for a Spartan-3 board (A digilent Spartan-3E starter board, or perhaps a 3E-1600 board) is based on both cost (they can be gotten easily on ebay for 125-150USD), and because the Digilent Spartan-3E Starter was used WIDELY by nearly every university on the planet to teach FPGA development. Many still use this board. There are lots of online resources available, and I *think* Pong Chu's book specifically uses this board as a dev platform. The Spartan-3E starter is also VERY "peripheral rich"... I actually looked at the Nexys-4 design, this morning, and made that recommendation as well. I think either a Spartan-3 Starter or a Nexys-4 board would work just find for Daniele's purposes.

Timing problems... It's been my experience using both ISE and Vivado that ISE PAR is faster and somewhat more robust than Vivado. Many of the designs I work on are fairly timing sensitive, crossing multiple clock domains, and are often required to work over a wide temperature range, so maybe we're just dealing with different levels of complexity. It has been my experience that timing problems, under ISE, are usually of my own doing... YMMV... ;-) What version of Vivado are you using? NOTE: I use both ISE and Vivado, but only because Xilinx forces me to... I've been using ISE since about v9 and I don't remember ever seeing the "hysteresis" that you're describing. (not saying you *didn't* experience it, BTW, just that I haven't). I have had weird things happen when trying to share dev space between a virtual machine and it's host via a "shared folder". REALLY weird things. But, in the end, that was my own doing. :-)

At Daniele... As a practicing EE, who builds fairly high performance FPGA based DSP solutions, I'm not sure I agree with the "simulation first" approach. I'd start working with hardware as soon as possible, and I'd forget any aspirations of "CPU development" for the first year you're working. Part of my motivation for suggesting this is that most of the world *isn't* doing CPU development. It's a fun hobby pursuit, but professionally, there are lots of cores available, and you'll probably never be expected to develop a CPU from scratch for any application. My preference is typically to use a Zync, or an external proc (a ARM or a dedicated DSP), rather than give up real estate to a soft core. Designs are always problem dependent, but... As Dan says, though, if all you can afford right now is a simulator, then that is what you should start with (although it sounds like Dan has a Spartan-3 board that he might part with... ;-))

Best!

/jw

I like this thread since i posted a similar request some time back. I started off learning myself buying a spartan 3 and a nexys board both from digilent. While i didn't aim too high i.e to learn CPU/GPUs i did learn basic stuff as to how to use the tools, simulator and some VHDL coding. I made some very basic projects with help from a FPGA course mike field put in at http://hamsterworks.co.nz/mediawiki/index.php/FPGA_course .
I'd like to be party to your projects as i'm willing to learn. BTW am a EE engineer but a software engineer by profession. Please let me know if you guys start off any project and can hold me as well :)