Hello everyone. I want to enhance my design/verification
skills and I am looking for a mentor/guide to help me through
this. If someone has a project in mind, preferably a meaningful
SOC, which they are thinking about, I would be happy to assist
you or if you know of a project that is just getting off the
ground please let me know. I have looked over some of the
projects contained here although not all and found that they
were either dead (a few years since their last update) or too
far along (well past specifications), but I will continue to
search. I would like to be involved or guided through every
aspect starting from specification. I am hard working, dedicated
and independent. I also can supply the following resources:
*5-10 hours per week (possibly more, but I can guarantee the min)
*Access to simulation tools and a dedicated linux box
*Verilog background (but very willing to work and learn in VHDL)
*Ingenuity and determination in solving problems

I am concerned with the experience and not the credit. If you
can help, please send me an email at "leroicollier at earthlink dot
net". Thanks in advance.

LeRoi

LeRoi, there are several in-depth verification tutorials shot at DVCon in May at: www.demosondemand.com/dod/feat_cont/seminars/dvcon.aspx These are free, as are the other 35 hours of conference sessions from DVCon. The Demos on Demand crew recorded the entire conference, which is exclusively focused on verification technology and issues. -----Original Message----- From: cores-bounces at opencores.org [mailto:cores-bounces at opencores.org] On Behalf Of leroicollier at earthlink.net Sent: Tuesday, June 07, 2005 8:39 PM To: cores at opencores.org Subject: [oc] IC Design mentor/guide needed - SOC Hello everyone. I want to enhance my design/verification skills and I am looking for a mentor/guide to help me through this. If someone has a project in mind, preferably a meaningful SOC, which they are thinking about, I would be happy to assist you or if you know of a project that is just getting off the ground please let me know. I have looked over some of the projects contained here although not all and found that they were either dead (a few years since their last update) or too far along (well past specifications), but I will continue to search. I would like to be involved or guided through every aspect starting from specification. I am hard working, dedicated and independent. I also can supply the following resources: *5-10 hours per week (possibly more, but I can guarantee the min) *Access to simulation tools and a dedicated linux box *Verilog background (but very willing to work and learn in VHDL) *Ingenuity and determination in solving problems I am concerned with the experience and not the credit. If you can help, please send me an email at "leroicollier at earthlink dot net". Thanks in advance. LeRoi _______________________________________________ http://www.opencores.org/mailman/listinfo/cores