I am a new developer of hardware security. Recently, I am having trouble in a sopc system design. I need to design a sopc system with a cpu and sdram controller, and then. The uCOS ii real time system running on this sopc. My hardware is a FPGA platform with Cyclone IV (EP4CE8). It has almost 6000 logic cells. I think it should run the 16bit MIPS, sdram controller and Wishbone bus. So, is there a 16bit MIPS with Wishbone bus system? Thanks in advance for any assistance!!

Have you looked at Brakefield's catalog of softcore CPU's? He lists quite a few MIPS processors in his "usable clones" list, and even some with Cyclone-4 support. None of them, however, are 16-bit processors.

I just checked at fpga4student.com as well. Loi Le has a 16-bit MIPS processor posted there. I don't know how well it is supported though, neither do I know if it uses a wishbone bus.

Have you considered any of the MSP clones on OpenCores, such as the openMSP430? They aren't 32-bit MIPS, although they are 16-bit microcontrollers.

Is there a particular reason you don't want a 32-bit processor? Perhaps you are trying to fit into a small space? The ZipCPU was designed to be a 32-bit processor that fits in small spaces, uses the wishbone bus, and even has a wishbone based SDRAM controller that works with it already.

Dan

P.S. Some of the posted links above are http and not https links. OpenCores seems to be automatically promoting them to https, so if you get a security warning ... just drop the s.

Thank you very much for your reply. I will consider other architecture processors. Yes, the main reason which I gave up the 32bit CPU is that I want to fit a system on chip into a limited resources FPGA platform.

If there is one CPU I would recommand, it is the neo430, 16 bits ISA compatible with MSP430 and wishbone bus too.
Well documented and will run easily on Cyclone IV.

https://github.com/schoeberl/leros should fit and its nice, but I don't thinks its wishbone.