After CISC and RISC, the development of the general processor architecture has basically stalle.

CISC architecture, represented by x86 instruction set, sticks to its territory for compatibility.Except for a few companies, no one has developed it. Its own structure is also developing very slowly.No new company is currently developing a pure CISC chip.

The RISC architecture also faces a big dilemma.Its theoretical is based on “ the statistical results of "80% of the instructions used in the operation of a typical program, accounting for only 20% of the instruction system of a processor.” But it doesn't say the sloution of, "what should I do with 80% of the instructions that are not commonly used in a processor's instruction system?" Only to choice the is made on a case-by-case basis when it comes to chip design.

With the rapid improvement of the wafer technology, it is basically equivalent to the increase of chip area in some aspects. The functions of the processor are no longer as penny-pinching as before. Clearly, the original RISC idea is no longer appropriate(However, pipeline technology developed on the basis of RISC architecture with multiple instructions overlapping execution must be retained). Even some RISC processors include branch prediction capabilities. Is this still a RISC processor if One processor core is not enough, just put more than one processor core on one chip? Thus it can be seen that the current general processor architecture has been far behind the development of wafer technology.

Why a lot of people nowadays call it "general-purpose processor architecture is very mature? Because there is no relatively new design structure, the various functional modules under the current architecture have been studied thoroughly. But is that really the case? What architecture will emerge from the development of CISC to RISC? What you do not know, do not not exist, to maintain a heart of awe.

The rapid development of GPU has made it far behind general-purpose processors in parallel computing. What about general-purpose processors? It looks like the CPU and GPU are glued together, and there's no better way to fuse.How do you naturally integrate GPU for parallel processing of big data into general-purpose processors?

PS: if the above statements have wrong characters, improper words, wrong contents, wrong logic, etc., please correct.

With all that said, it's clear that I have my own solution for what's missing from today's general-purpose processors, but it's not convenient to put it here. The general processor architecture I designed named as ZISC(Zhu's Instruction Set Computer) (祝氏指令集计算机). It's not up to me to decide whether my solution makes sense, and whether it really belongs to the next generation of general-purpose processor architectures.



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In 2007, I implemented a very simple processor based on ZISC architecture on an FPGA development board, which is a validation model. It’s workable when run through the assembler on it. (A few simple assembler programs, at that time bought a book, according to write a lexical analysis of the program, the assembly into binary code). That processor model is 8-core.


Email: zhu1982lin@gmail.com