I am going to include external memory in my fpga based design.Off-chip
memory consists of 4 memory banks (DDR,4 separated chips,common
chip select,write enable,column-row address lines).
I am wondering which is better approach:

1)one controller (implemented in fpga) that handles 4 chips - easy
design ,small size but because of phisicall discrepancy between chips
maybe freq is limited or not posibble to controll chips at all.
2)4 separated memory controllers-each controller handles one chip.Then
decision circuit that determines if read/write transaction is finished
successfully from 4 chips.
Each memory is 8bit output.I need 32 bit output during one clock period.

Daniel