Hi,
I'm a student in Computer Engineering. I've just started my Diploma
Thesis which is going to be an open DSP processor in vhdl.

I'm looking for architectures, block diagrammes, instruction sets, etc
etc, anything that could help me do my project.

Anyone?


Georgios Andronikidis
Greece

Aloha!



My advice would be to look at the OpenRISC architecture and look at ways
to extend it witd DSP functionality, either directly to the main datapath
or as a tightly connected co-processor/ALU.

First you need to start by deciding if it should be a fixed point or
floating point DSP extension. When that is done I would recommend looking
at things like:

(1) DSP-coprocessors for ARM cores and how they are integrated.
(2) The extension mechanisms in ARC, Tensilica.

But then basically what you need is programmable counters and
registers/tables that allows you to perform MAC/FMAC operations in 1-2
cycles with fast loading of the coefficient tables and operands.

Then if you would like to go a bit more wild you could look at making the
co-processor instead work on CORDIC-operations.

Another more wild idea is to look at the DSP-units (called SPE) in the
Cell Broadband Engine aka the Cell processor. These are vector/SIMD-based
computational units for single precision floats (not complete IEEE 754 -
lacks some round modes). The SPE contains two pipelines for vector
operations a local reg file and local processing memory. It would probably
be a very interesting topic to develop a single-scalar scaled-down
lookalike of SPE that is tightly integrated into the OpenRISC.

DISCLAIMER: I haven't looked at the OpenRISC architecture lately and don't
know what mechanisms for ALU extension that is present. I do like the way
ARC does it though.

Also, remember, a successful architecture (or extension thereof) is always
based on some insight into the applications and the environment it is
targeted for. You should both in your work and in your thesis state what
applications you are forseeing and optimizing for. Then you can also do
good benchmarks which allows you to insert nice graphs showing the
performance performance/watt etc in your thesis.

Good luck!
--
Med vänlig hälsning

Joachim Strömbergson
-----------------------------------------------

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 macedon at mhl.tuc.gr wrote: Geia sou Giwrgo (Hi George) Bobcat is a 16-bit DSP but i don't recall what are the specific licensing issues for using it (was it ever released in GPL)? Can anyone comment on the status of Bobcat? If it's free, does anyone have any pointers to its sources? Check out the source code for the C54x DSP, available here at OpenCores. It is written in Verilog. Nikolaos Kavvadias -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.0 (MingW32) Comment: Using GnuPG with Thunderbird - http://enigmail.mozdev.org iD8DBQFECGkCMPiy0tCWlz4RAiIqAKC4yAo1T+KbvDe/96loSsN8jimKRQCgpvox +3XeGP3X86uOygvmVDtWeRg= =w5ga -----END PGP SIGNATURE-----

You should study TI architecture (mainly VLIW chip) or other using SIMD
instruction set.

DSP does not need to cleanly change there state so it's much easier than
general purpose CPU. It could be interresting to save/restore DSP internal
state from high avalaibility point of view.

But bascaly, DSP are multiply units with scheduler and support to program
it in C (simpler than ASM).

thes kwdika i keimena epeksigisis (papers i biblia)? se poion kathigiti eisai? spyros (ps erxomai gia metaptyxiaka sta xania ayto to eksamino apo polytexneio ksanthis) Αρχικό μήνυμα από macedon at mhl.tuc.gr:

woops! i'm trully sorry for that. It was meant to be sent in private. spyros Αρχικό μήνυμα από Σπυρίδων Νίνος sninos at ee.duth.gr>: