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Other Open cores
by Unknown on Mar 24, 2006 |
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Hello,
I am new to this list, and new to fpga, and diving in way above my
head in terms of my basic electronics knowledge... however just
stumbling across the technology (isn't the www, google, wikipedia,
etc... great!), this stuff looks really interesting and something I
would like to learn for fun...
Sorry for the newbie questions, but I did skim the FAQ and some of the
list archive.... (but, may have missed something...)
1. Is there a place where other "free" cores are listed? I have come
across several on this site. Even if the project is not maintained
here, I would think it to be useful if there are links somewhere to
other locations. For example, Sun's new OpenSPARC T1... at
http://opensparc.sunsource.net/nonav/index.html, and Xilinx.com has
several free (some are free, and it looks like some more are free if
you get their development board and tools, and others are simply not
free). Plus a few other sites I ran across that I don't recall.
2. On the subject of the Sparc T1... has anyone tried to place it on
an fpga yet? If so, will it fit, and what speed/fpga? Can it easily
fit on multiple FPGAs?
3. This was sort of on the archive, but not completely... As a
beginner, what development board should I get? Correct me if I'm
wrong... but, I think the Spartan-3E starter kit is too small/slow
for what I really want to do (including gigabit Ethernet interface).
However, I think it will be powerful enough to test parts of my ideas
without investing a lot of money, at which point I should be able to
just purchase the higher-end chips, or get bored... and it will let me
experiment with their EDK in addition to the ISE (which alone might be
enough to test some ideas on paper with the schematic and other
tools). I also assume the EDK would be even better to start with for
a beginner. Does any other vendor include as much software with their
development boards? (or offer low-cost software)? Even if the
software options are not as good, does any other vendor offer higher
speed or higher density parts for a better price? I don't want to get
too used to the Xilinx tools if that not what I want to end up with
when I need a bigger/faster fpga...
4. I think I seen answers to this already in the archives, so feel
free to skip... Any recommended resources for VHDL or Verilog (books,
weblinks, etc..) would be appreciated. From what little I have seen,
some of the open cores I am interested in appear to be in Verilog and
others appear to be in VHDL, so I will probably need to learn a at
least a little of each...
Thanks.
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Other Open cores
by Unknown on Mar 24, 2006 |
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Hi
2. On the subject of the Sparc T1... has anyone tried to place it on
an fpga yet? If so, will it fit, and what speed/fpga? Can it easily fit on multiple FPGAs? The T1 seems much to big for me to fit on one fpga. Multiple fpga's is tricky because you have to build the interfaces.
3. This was sort of on the archive, but not completely... As a
I don't know the altera stuff, but if you wan't to get a big fpga there is the
XUP board from xilinx. Which is pretty cheap for academic customers (.edu?).
http://www.digilentinc.com/Products/Detail.cfm?Nav1=Products&Nav2=Programmable&Prod=XUPV2P
Otherwise see:
http://www.fpga-faq.com/FPGA_Boards.shtml (down at the moment of writing)
Cheers
ST
beginner, what development board should I get? |
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Other Open cores
by Unknown on Mar 24, 2006 |
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>>
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Other Open cores
by Unknown on Mar 24, 2006 |
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On 3/23/06, Lauro, John jlauro at umflint.edu> wrote:
1. Is there a place where other "free" cores are listed? I have come across several on this site. Even if the project is not maintained This is the most complete listing and hosting of free HDL that I'm aware of. 2. On the subject of the Sparc T1... has anyone tried to place it on
an fpga yet? If so, will it fit, and what speed/fpga? Can it easily
fit on multiple FPGAs? Highly unlikely to work. Mainly it's a question of scale: the processor is designed to run in a full-custom process, using a mid-range die in a recent process. That puts it well beyond the capabilities of any single FPGA. 3. This was sort of on the archive, but not completely... As a
beginner, what development board should I get? Correct me if I'm
I've been using an ML402 development board, and been pretty happy with it. The Virtex parts are a lot more capable than the Spartan ones, but the tools to map into them get pricey, so it's partly an economic issue. 4. I think I seen answers to this already in the archives, so feel
free to skip... Any recommended resources for VHDL or Verilog (books,
I'll admit upfront I have a strong Verilog bias, but I also think the free
tools available for Verilog are better than their VHDL equivalents. Cver is
a commercial-quality simulator, and Dinotrace and GTKwave are, if not up to
the same standard, good enough to get the job done.
The "standard" verilog book used to be the Thomas and Moorby book, but it's
a bit dated now. With the recent profusion of materials, I would imagine
you can find some free courseware on the 'net that gives the basics, and
there's certainly enough sample code available here and elsewhere.
- Guy
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weblinks, etc..) would be appreciated. From what little I have seen, some of the open cores I am interested in appear to be in Verilog and |
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Other Open cores
by Unknown on Mar 27, 2006 |
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Aloha!
On 3/23/06, Lauro, John jlauro at umflint.edu> wrote:
Highly unlikely to work. Mainly it's a question of scale: the processor
is designed to run in a full-custom process, using a mid-range die in a
recent process. That puts it well beyond the capabilities of any single
FPGA.
But the Niagara T1 contains eight cores, each of which is a single-scalar in-issue but multithreaded core. You should be able to run a one or a few of those cores in an FPGA. The Niagara architectures is actually designed to be scaleable in many different ways. Number of cores, number of threads/core, number of cores/shared resource (caches, external mem-interface, accelerator co-processors etc). Sun is naturally looking at scaling UP, but my guess is that you also should be able to scale DOWN. The Niagara is actually quite interesting for embedded solutions. Less reliance on caches for example should provide better support for deterministic real-time performance. I haven't looked at the code yet though. Hopefully it is less custom-design -ish than the PicoJava code which basically was a hand written netlist. I guess that we at Ericsson i Gothenburg were one of the very few outside Sun that actually did some serious attempts at running that code through a complete tool suite. The Pico in PicoJava was clearly not a reference to the size of the CPU. -- Med vänlig hälsning Joachim Strömbergson ----------------------------------------------- |
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