Try to add a default statement to the case. 'when others => ...' Richard -----Original Message----- From: cores-bounces at opencores.org [mailto:cores-bounces at opencores.org] On Behalf Of tullio.grassi at gmail.com Sent: Monday, August 21, 2006 5:57 PM To: cores at opencores.org Subject: [oc] radix 4 complex fft by ZHAO Ming ( cfft ) We have used the radix 4 complex fft by ZHAO Ming ( cfft project ). It seems to work fine, but our simulators (ModelSim and ISE sim) give really a lot (1000's) of identical warnings. ISE sim gives: Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es). I traced it back to cfft4.vhd, where signal RegAI is used in the case statement without being initialized properly (that is not all components are initialized in each case). I tried to fix it but unsuccesfully (I am more a verilog guy than vhdl). Has anybody fixed this problem ? It is really annoying because the useful messages from the simulator get lost between the 1000's of warnings. Tullio _______________________________________________ http://www.opencores.org/mailman/listinfo/cores

We have used the radix 4 complex fft by ZHAO Ming ( cfft project ).
It seems to work fine, but our simulators (ModelSim and ISE sim) give
really a lot (1000's) of identical warnings.
ISE sim gives:
Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand,
the result will be 'X'(es).

I traced it back to cfft4.vhd, where signal RegAI is used in the case
statement without being initialized properly (that is not all
components are initialized in each case).
I tried to fix it but unsuccesfully (I am more a verilog guy than vhdl).
Has anybody fixed this problem ?
It is really annoying because the useful messages from the simulator
get lost between the 1000's of warnings.

Tullio