Has anyone been successfull in implementing the I2C core in Xilinx ISE?--- On Mon 03/26, Mikhail Matusov misoma at rogers.com > wrote: From: Mikhail Matusov [mailto: misoma at rogers.com]To: cores at opencores.orgCc: heedaf at excite.comDate: Mon, 26 Mar 2007 10:21:44 -0500Subject: Re: [oc] I2C Open Drain VHDL ImplementationOn Mon, 26 Mar 2007 01:46:02 -0400 (EDT)"D R" wrote:> How do I implement the open drain and how is the line pulled to VCC?in VHDL:output_pin http://www.excite.com The most personalized portal on the Web! -------------- next part -------------- An HTML attachment was scrubbed... URL: http://www.opencores.org/forums.cgi/cores/attachments/20070330/0f75498d/attachment.htm