1/1 
|
debug unit should indicate which checkpoint caused thetrap
by Unknown on Feb 4, 2004 |
Not available! | ||
|
Status bits would have to be added to identify which matchpoint caused the
exception. It is not a problem to add them, but I kind of like not to have
too many bits around. So maybe we can shave off some other bits that are not
needed - ie make the whole debug unit more simple and efficient w/o losing
too much impoirtant functionalities.
regards,
Damjan
----- Original Message -----
From: "Heiko Panther" heiko.panther@web.de>
To: openrisc@opencores.org>
Sent: Wednesday, February 04, 2004 12:06 PM
Subject: [openrisc] debug unit should indicate which checkpoint caused
thetrap
I've got most of gdb stub implemented to use hard break- and
watchpoints. There is one place where gdb wants to know whether a
breakpoint, access watch or read watch was hit, and also the data
address in case of a watchpoint.
I can't really figure that out with the registers of the current debug
unit. I would need a set of bits that indicate which checkpoint matched
the processor state when the trap was generated. Is that possible, Damjan?
Heiko
_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc
|
|||
1/1