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Adding custm instructions to the or1ksim
by Unknown on Feb 9, 2004
Not available!
Hi:

I am having problems adding custom instructions to the or1ksim.

I was able to modify l.cust11 to print a statement to the console, but am not able to
understand how parameters can be passed to the custom instruction. i.e. does the
custom instruction have a predefined fixed set of source and destinatination
registers.

if so how can i set the value of the source registers. when ever I try to do
set_operand32(0, value, &breakpoint) it works fine, but if i do
set_operand32(x, value, &breakpoint) where x is any value > 0. It gives me an error
in compiling the simulator

137:l.cust1
138:l.cust2
Invalid operand type.
make[3]: *** [execgen.c] Error

Has anyone done any work on adding custom instructions to the SIM. if so would i
be able to access your source code.

thanks and regards
Krishna
Adding custm instructions to the or1ksim
by Unknown on Feb 9, 2004
Not available!
Krishna, can you please post how did you define l.cust1 instruction in or32_opcode table? I suppose you forgot to declare operands if you want to do it this way. You can also decode and execute the instruction in l_cust1 function. Marko On Monday 09 February 2004 06:01, nmkrishna@post.com wrote:
Hi: I am having problems adding custom instructions to the or1ksim. I was able to modify l.cust11 to print a statement to the console, but am not able to understand how parameters can be passed to the custom instruction. i.e. does the custom instruction have a predefined fixed set of source and destinatination registers. if so how can i set the value of the source registers. when ever I try to do set_operand32(0, value, &breakpoint) it works fine, but if i do set_operand32(x, value, &breakpoint) where x is any value > 0. It gives me an error in compiling the simulator 137:l.cust1 138:l.cust2 Invalid operand type. make[3]: *** [execgen.c] Error Has anyone done any work on adding custom instructions to the SIM. if so would i be able to access your source code. thanks and regards Krishna _______________________________________________ http://www.opencores.org/mailman/listinfo/openrisc




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