Hello:
I'm glad to announce that the University of Cantabria is showing the
new OpenRisc 1500 implementation in University Booth of DATE'04
conference. We'll be glad to explain all the things you are interested on
about the microprocessor.
Ask for Hector Posadas or Javier Castillo.

Regards

Very nice! Why not import it in cvs?

Aloha! Quoting jcastillo@escet.urjc.es: Sounds very interesting! Do you have a link to a page with a description of thep principal differences between 1500 and 1000? -- Med vänlig hälsning, Yours Joachim Strömbergson - Alltid i harmonisk svängning. VP, Research & Development ---------------------------------------------------------------------- InformAsic AB / Hugo Grauers gata 5B / SE-411 33 GÖTEBORG / Sweden Tel: +46 31 68 54 90 Fax: +46 31 68 54 91 Mobile: +46 733 75 97 02 E-mail: joachim.strombergson@informasic.com Home: www.informasic.com ----------------------------------------------------------------------

Joachim, in general openrisc 1000 is only architecture definition. Like saying x86. And 1500 or 1200 are implementations of this architecture (like saying 386, 486 etc). But of course I don't know the details of 1500. This is I hope guys from University of Calabria will describe what it is. regards, Damjan ----- Original Message ----- From: "Joachim Strombergson" Joachim.Strombergson@informasic.com> To: "List about OpenRISC project" openrisc@opencores.org> Sent: Friday, February 20, 2004 3:20 PM Subject: Re: [openrisc] OpenRisc 1500 in DATE'04
of thep

Aloha! Quoting Damjan Lampret lampret@opencores.org>: My question was actually aimed to Hector Posadas or Javier Castillo and I'm aware of the OpenRISC 1000 spec vs implementation like OpenRISC 1200. Let me rephrase the question then. Hector: What are the specific features of the OpenRISC-implementation that differ from other OpenRISC implementations? BTW Damjan you description above might be good explanation at why the name "OpenRISC 1000" is probably a bad name for a general API when the implementation instances are calle "1200", "1500" etc. Calling the API/defintition something distinct (x86, IA-64, SPARC V9) and the implementations something else (PentiumIII, Itanium, UltraSPARC IIIi) makes for less confusion. I suggest that you at least drop the "1000" just having OpenRISC, change the number a more normal version numer (1.0, 2.0 - similar to SPARC, IA-64 specs) etc would probably lessen the confusion. I might be the only one that sometimes mixes these kinds of things, but I'm not sure I'm unique in that respect. ;-) -- Med vänlig hälsning, Yours Joachim Strömbergson - Alltid i harmonisk svängning. VP, Research & Development ---------------------------------------------------------------------- InformAsic AB / Hugo Grauers gata 5B / SE-411 33 GÖTEBORG / Sweden Tel: +46 31 68 54 90 Fax: +46 31 68 54 91 Mobile: +46 733 75 97 02 E-mail: joachim.strombergson@informasic.com Home: www.informasic.com ----------------------------------------------------------------------

Hello: Sorry for the late in answer. I just arrived from Paris today. The main characteristic of OpenRisc 1500 is that is has been described in RTL SystemC and is fully parametrizable. It implements the all the optional units except the MMU. All the units also implements the optional features as cache prefetch. In minimal configuration is it 67.000 gates in a virtexE and in maximun with 8KB caches 1.200.000 gates. In VirtexE in minimun configuration runs at 20 Mhz and in a Virtex2 at 50Mhz in maximun conf. in the Virtex2 runs at 40Mhz and in the VirtexE at 15Mhz. All the configurations are checked in a evaluation board running all the eCos tests from 1.3.1 and 2.0 versions. Debbuging access is fully soported through JTAG or eCos stub. If you want more information please contact me at jcastillo@escet.urjc.es Regards Javier Castillo Villar ----- Original Message ----- From: "Joachim Strombergson" Joachim.Strombergson@informasic.com> To: "List about OpenRISC project" openrisc@opencores.org> Sent: Friday, February 20, 2004 3:11 PM Subject: Re: [openrisc] OpenRisc 1500 in DATE'04
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