



Problems with virtual vectors
by Unknown on Mar 10, 2004 |
Not available! | ||
I am trying to debug some failing code for eCos on an OpenRISC platform.
Basically, I am using the same configuration as a previous build which
worked fine before with the following differences:
Debug UART is at 0x30000000 instead of 0x90000000
RAM starts at 0xf0000000 instead of 0x00000000
UART interrupt is on interrupt 6 not 2
I have a very simple bootstrapper at 0x100 (where the OpenRISC jumps to on
reset) which set the EPH bit in the SR to relocate the exception vectors to
0xf0000000, then jumps to 0xf0000100. The code is externally loaded in RAM
prior to the bootstrapper running.
What happens is this:
enter:
hal_if_init(), which calls
cyg_hal_plf_comms_init, which calls
set_debug_comm(CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL).
In this function, it seems to fail to return from a call to
CYGACC_COMM_IF_CONTROL(*__chan, __COMMCTL_IRQ_DISABLE);
The values I record are:
__chan = 0xf0008828
*__chan = 0xf0008828
(*__chan)[5] = 0x00000000
I am assuming 5 is the index into the table for the control function, but
this seems to be NULL. Or am I barking completely up the wrong tree? I do
find the virtual vector stuff very arcane! I will try and work out what the
working code does tomorrow but any help would be appreciated.
Robert Cragie, Design Engineer
_______________________________________________________________
Jennic Ltd, Furnival Street, Sheffield, S1 4QT, UK
http://www.jennic.com Tel: +44 (0) 114 281 2655
_______________________________________________________________
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Problems with virtual vectors
by Unknown on Mar 10, 2004 |
Not available! | ||
* Robert Cragie (rcc@jennic.com) wrote:
I am trying to debug some failing code for eCos on an OpenRISC platform.
without looking into actual code i'd say problem might be on
UART side. the 0x3xxxxxxx address are cached by default (the
0x9xxxxxxx are not which is how it should be)... it may very well be
something else though...
http://www.opencores.org/tmp/cvsget_cache/or1k/orp/orp_soc/doc/ORP.txt
regards,
p.
Basically, I am using the same configuration as a previous build which worked fine before with the following differences: Debug UART is at 0x30000000 instead of 0x90000000 RAM starts at 0xf0000000 instead of 0x00000000 UART interrupt is on interrupt 6 not 2 I have a very simple bootstrapper at 0x100 (where the OpenRISC jumps to on reset) which set the EPH bit in the SR to relocate the exception vectors to 0xf0000000, then jumps to 0xf0000100. The code is externally loaded in RAM prior to the bootstrapper running. What happens is this: enter: hal_if_init(), which calls cyg_hal_plf_comms_init, which calls set_debug_comm(CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL). In this function, it seems to fail to return from a call to CYGACC_COMM_IF_CONTROL(*__chan, __COMMCTL_IRQ_DISABLE); The values I record are: __chan = 0xf0008828 *__chan = 0xf0008828 (*__chan)[5] = 0x00000000 I am assuming 5 is the index into the table for the control function, but this seems to be NULL. Or am I barking completely up the wrong tree? I do find the virtual vector stuff very arcane! I will try and work out what the working code does tomorrow but any help would be appreciated. |
Problems with virtual vectors
by Unknown on Mar 12, 2004 |
Not available! | ||
UART side. the 0x3xxxxxxx address are cached by default (the
0x9xxxxxxx are not which is how it should be)... it may very well be And of course the default of what is cached and what is not in OR1200 RTL can be changed by adjusting the defines in or1200_defines.v. I don't remember define names but just do a search for "cache" and you should find the right define. regards, Damjan |



