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webpack and openrisk ?
by Unknown on Sep 9, 2004 |
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hi all, I'm new to all fpga implementation from ipcore.
I have read the tutorial from openrisk for xilinx target. I have a question about the ram block. In the tutorial you mantion that we need to use the core gen to benerate the block of ram. In the webpack edition of xilinx, we don't have this feature. I would like to know how can i bypass this ?
this is suppose to run on a spartant 3
regards
jonathan
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webpack and openrisk ?
by zhustudio on Sep 10, 2004 |
zhustudio
Posts: 15 Joined: Sep 1, 2008 Last seen: May 21, 2022 |
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hi Jonathan,
you can use ram primitive directly from xilinx lib, such as ramb16_s4. instance each ram by using this method. zhustudio Jonathan Dumaresq wrote:
hi all, I'm new to all fpga implementation from ipcore.
I have read the tutorial from openrisk for xilinx target. I have a
question about the ram block. In the tutorial you mantion that we need
to use the core gen to benerate the block of ram. In the webpack edition
of xilinx, we don't have this feature. I would like to know how can i
bypass this ?
this is suppose to run on a spartant 3
regards
jonathan
------------------------------------------------------------------------
_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc
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webpack and openrisk ?
by Unknown on Sep 10, 2004 |
Not available! | ||
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ok . I would like to know if you have any suggestion for book to starting
with fpga.
I have read the xilinx fpga handbook but now i would like to go deeper in
fpga.
regards
Jonathan
----- Original Message -----
From: "Damjan Lampret" damjanl@opencores.org>
To: "List about OpenRISC project" openrisc@opencores.org>
Sent: Friday, September 10, 2004 9:27 PM
Subject: Re: [openrisc] webpack and openrisk ?
I'm not familiar with Spartan3 but Virtex rams are supported and I think
the
tools can also use them in case of Virtex2 so I'm concluding it might work
for Spartan3 as well. But in case you have problems, just instantiate
Spartan3 rams instead of Virtex rams. When you learn you will understand
this is trivial modification.
regards,
Damjan
----- Original Message -----
From: "Jonathan Dumaresq" jdumaresq@cimeq.qc.ca>
To: openrisc@opencores.org>
Sent: Thursday, September 09, 2004 4:45 PM
Subject: [openrisc] webpack and openrisk ?
hi all, I'm new to all fpga implementation from ipcore.
I have read the tutorial from openrisk for xilinx target. I have a
question
about the ram block. In the tutorial you mantion that we need to use the
core gen to benerate the block of ram. In the webpack edition of xilinx, we
don't have this feature. I would like to know how can i bypass this ?
this is suppose to run on a spartant 3 regards jonathan -------------------------------------------------------------------------- ------
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/openrisc
_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc
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webpack and openrisk ?
by Unknown on Sep 11, 2004 |
Not available! | ||
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I'm not familiar with Spartan3 but Virtex rams are supported and I think the
tools can also use them in case of Virtex2 so I'm concluding it might work
for Spartan3 as well. But in case you have problems, just instantiate
Spartan3 rams instead of Virtex rams. When you learn you will understand
this is trivial modification.
regards,
Damjan
----- Original Message -----
From: "Jonathan Dumaresq" jdumaresq@cimeq.qc.ca>
To: openrisc@opencores.org>
Sent: Thursday, September 09, 2004 4:45 PM
Subject: [openrisc] webpack and openrisk ?
hi all, I'm new to all fpga implementation from ipcore.
I have read the tutorial from openrisk for xilinx target. I have a question
about the ram block. In the tutorial you mantion that we need to use the
core gen to benerate the block of ram. In the webpack edition of xilinx, we
don't have this feature. I would like to know how can i bypass this ?
this is suppose to run on a spartant 3
regards
jonathan
--------------------------------------------------------------------------------
_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc
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