Running uClinux on OR1200 using Verilog Simulator

I've sucessfully gotten uClinux to run on the OR1200 RTL verilog code
using a verilog simulator (cadence for my case). This brief tutorial
will hopefully help anyone else who would like to do the same:

The default memory mapping used by uClinux does not directly map to the
OR1200 RTL XESS FPGA. These are the changes necessary to get uClinux to
run using OR1200 RTL on a verilog simulator.

The following modifications need to be made in the uClinux-2.0.x directory:
In the file arch/or32/board/rom.ld
MEMORY
{
romvec : ORIGIN = 0x04000000, LENGTH = 0x2000
flash : ORIGIN = 0x04002000, LENGTH = 0x00800000 - 0x2000
eflash : ORIGIN = 0x04800000, LENGTH = 0
ramvec : ORIGIN = 0x00000000, LENGTH = 0x00002000
ram : ORIGIN = 0x00002000, LENGTH = 0x00800000 - 0x2000
eram : ORIGIN = 0x00800000, LENGTH = 0
}

In the file include/asm/board.h
#define FLASH_BASE_ADD 0x04000000
#define MC_BASE_ADD 0x60000000

Everything else can be left at their default values.

Build the linux kernel using the usual make all. Note you can use make
clean; make dep; make all if you are paranoid about getting rid of stale
files.

Once this is done, you can verify that it works using the
or32-uclinux-sim, the following changes are needed in the sim.cfg file

nmemories = 3
device 0
name = "FLASH"
ce = 0
baseaddr = 0x04000000
size = 0x00800000
delayr = 10
delayw = -1
enddevice
device 1
name = "RAM"
ce = 1
baseaddr = 0x00000000
size = 0x00800000
delayr = 1
delayw = 2
enddevice
device 2
name = "SRAM"
ce = 2
baseaddr = 0x08000000
size = 0x00400000
delayr = 1
delayw = 2
enddevice

section mc
enabled = 1
baseaddr = 0x60000000
POC = 0x00000008 /* Power on configuration register */
end

Once the linux kernel is compiled and verified using the or1200
simulator, you have to produce an ASCII hex of the code to import into
the verilog simulator. To do this,

In the sw directory of the OR1200 distribution create a directory called
linux. Copy the compiled linux binary to this directory and do the
following:

or32-uclinux-objcopy -O binary linux linux.bin
../utils/bin2hex linux.bin > linux.hex
cp linux.hex ../../sim/src/

Edit your scripts as necessary to make sure that linux.hex is copied to
the file flash.in in the sim/src directory. Run the verilog simulator
and it will use flash.in (your linux kernel) and should produce results
similar to the or1200 simulator. Note: In order to see the output of
the shell, you will need to edit the uart16550 verilog code to write any
activity out to a log file. This can be done in the file uart_tfifo.v
in the uart16550 directory. Add something like the following to the
uart_tfifo module:

// synopsys translate_off
integer fuart;
initial fuart = $fopen("uart_out.log");
always @(posedge clk) begin
if (push) begin
$fwrite(fuart, "%c", data_in);
end
end
// synopsys translate_on

This will write all characters received by the UART from the CPU to a
file called uart_out.log

Note: Simulation in verilog is very slow. The uClinux boot sequence
requires about 20 Million instructions to complete.



--Chris