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OR1200 and memory controller
by Unknown on Oct 1, 2004 |
Not available! | ||
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Hi,
I want to build up a SoC based on OR1200 and the memory controller and conmax core written by Rudolf Usselmann. Now I have the following problem: If I connect the memory controller to slave port 2 (so its address space is 0x20000000-0x2FFFFFFF), everything works fine. If I connect a Wishbone-only-wired version of this controller (that means: only Wishbone wires wired, no external memory attached) to slave port 0, I can access the registers, too. But if I connect the controller with external wiring to slave port 0 (so its address space is 0x00000000-0x0FFFFFFF), I can't access neither the memory nor the registers. My question is: What could cause this problem? Does anyone have a hint for me how to solve this? Or (as a possible work around): Can anyone give me a hint how to set the power-on value of the program counter to an address other than 0x0? Thank you! Danny |
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