Hi, I am trying to make a jtag connection through the Open Risc processor. I have done the following. 1. Downloaded the OR1200 bit file to a Xilinx FPGA (VP20) 2. Running the program ./jp1-xilinx 9999 (connection is made via parallel cable IV). I get the folllowing messages Connected to parallel port at 378 Invalid CRC Read npc = ffffffff ppc = ffffffff r1 = ffffffff Expected npc = 4000000c ppc = 40000024 r1 = 00000005 Read npc = ffffffff ppc = ffffffff r1 = ffffffff Expected npc = 4000000c ppc = 40000024 r1 = 00000008 Read npc = ffffffff ppc = ffffffff r1 = ffffffff Expected npc = 40000024 ppc = 40000020 r1 = 0000000b ...... Read npc = ffffffff ppc = ffffffff r1 = ffffffff Expected npc = 4000000c ppc = 40000024 r1 = 000000c9 result = 5eadda8e Connection with jtag via parallel port failed. Has any one experienced similar behavior before. ? Any tips pointers appreciated. Thanks, Farhan _______________________________________________ http://www.opencores.org/mailman/listinfo/openrisc

Hi. You already have the tip in the bottom: "Connection with jtag via parallel port failed." The communication doesn't work. Looks like you're using the previous (old) version of the debug interface. Check the TRST signal first. It is used as active high signal although it is active low outside the FPGA. Regards, Igor On Wed, 1 Dec 2004 07:15:12 +0100, farhan@v... farhan@v...> wrote:
processor.

via parallel

pointers

Hi Igor, Thanks for your help. There was a problem with the way I connected/configured jtag. Now it does work. However, I do see a few more problems. After I load the hello_word program in gdb (and follow the tutorial instructions... set$pc=0x100) .. the system hangs there.. i.e I do not see any output on hyperterminal. To try the debug that, I am trying to reset the FPGA and restart the jtag and gdb programs. But now, even after the reset, the expected and read value do not match. Is this expected behavior.? Can you please describe in a few lines, which registers the jp1.c is trying to access/read. Is there any documentation for the program. Thanks, Farhan ----- Original Message ----- From: Igor Mohorigor.mohor@g...> To: Date: Tue Dec 7 08:42:07 CET 2004 Subject: [openrisc] JTAG connection: SW Tutorial


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First of all I would like to advise you to move to jp2. That means
you
need to take new debug interface, JTAG and SW (jp2). jp1 had some
problems sometimes (more corner cases). That was the reason jp2

the new version of debug was made. It is definitely more robust and works better. And the answer to you question is "NO" :) Regards, Igor On Thu, 9 Dec 2004 01:56:35 +0100, farhan@v... farhan@v...> wrote:
a few

tutorial

I do not

restart the

expected and

jp1.c is

program.

Thanks Igor, So I understand there is no documentation but would you mind describing in a few lines the functionality. I am sure it would help others too. I am new to this and was trying to follow the HW and SW tutorials which do not talk about jp2 at all . I do beleive I have the latest debug interface and jtag .. How do I check that ? I mean cvs would be the best way right ? I have dbg_interface with the date march 2002. Is that when you updated it. Thanks, Farhan ----- Original Message ----- From: Igor Mohorigor.mohor@g...> To: Date: Thu Dec 9 08:34:25 CET 2004 Subject: [openrisc] JTAG connection: SW Tutorial
and