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JP2 seems to work fine; Still problem with GDB/Hello World
by Unknown on Dec 14, 2004 |
Not available! | ||
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Hi all,
JP2 gave us similiar results to the ones you describe. We couldn't get JP2 going so we decided it might be easier to write our own interface, by altering JP2 to suit. Apparently JP2 already has some nice debug options (printing Jtag info with pretty colours etc) We are looking to get more info from our hardware so we can determine exactly what bits/bytes the jtag is spitting out, and hence where our problem is. More of a lower-level debugger. I will report back when we have something useful. I should mention that the or1200 we are using has been hacked up a bit. regards, Luke
Hi Igor,Danny, Luke, and all.
Have you run Hello World (from the software tutorial) on a Xilinx
board/FPGA ? I have now switched to jp2, after downloading new debug
interface and jtag module and that seems to work fine but the gdb gets
stuck after I try to download the code. This is the message I get on the
jtag window
JTAG ID = c388a928
Dropping root privileges.
JTAG Proxy server started on port 9999
Press CTRL+c to exit.
After I set the target to JTAG in gdb I see the following messages
set_chain 1
set_chain 4
rr 4
wr 4
rr 4
rr 4
wr 4
set_chain 1
rr 1
set_chain 1
rr 1
set_chain 1
rr 1
repeats several times
Now, when I try to load the program.... the JTAG window starts
giving message
JTAG ID = c388a928
RETRY
RETRY
RETRY
RETRY
and while the gdb window gives the message loading and gets stuck
there . Any idea whats going on ? Any tips would be appreciated.
Thanks again
Farhan
----- Original Message -----
From: Danny Baumanndanny.p.baumann@w...>
To:
Date: Fri Dec 10 08:23:34 CET 2004
Subject: [openrisc] Invalid CRC
Hi,
when using the debug module with the separate TAP module, you have
to
_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc
use jp2-xilinx. Use jp1-xilinx only when instantiating the old debug module with integrated TAP module. Regards, Danny Luke Darnell schrieb:
Hi all,
We have synthesised and programmed our FPGA with or1200 (w/ Debug
Module) and the TAP.
Have hooked up our JTAG cable and it seems to be working correctly. (We
can check the ID of the TAP).
We are trying to run
./jp1-xilinx 9999
and all we get is
Invalid CRC
Invalid CRC
Invalid CRC
Invalid CRC
etc.....
Has anyone had this problem before?
Any hints or tips appreciated.
regards,
Luke
_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc
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JP2 seems to work fine; Still problem with GDB/Hello World
by Unknown on Dec 21, 2004 |
Not available! | ||
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Hi all,
We now have a working gdb/jtag debugging system. The problem was that our or1200 implementation is different to the one in the CVS. We changed JP2 and were able to get it working. So if you change the or1200 to much, you might have to change JP2 to suit. Thanks Igor and everyone else for the help. regards, Luke
Our system is working fine without any problems. It consists of two
CPUs (OR1200 and 8051) and debugger for both works excellent. No
problems at all.
Perhaps you screwed up with the "hack".
First you need to be sure that you can read out the ID. That means
that the JTAG connection is OK.
Then try to change value of some registers. All the data is protected
with the 32-bit CRC. If the CRC is OK, that means that the
communication is OK. This still has nothing to do with the CPU
debugging. Now if you have connected the CPU correctly, you should be
able to debug it. Perhaps you want to add some test register to the
CPU (to see if everything is OK on the CPU side). If your CPU is
running at low frequency, follow the "working with the slow CPU (or
something like this) in the documentation.
And of course, take the latest version of the OR1200...
I hope this is enough for a start.
Regards,
Igor
On Tue, 14 Dec 2004 17:04:08 +1000, Luke Darnell
luke.darnell@g2microsystems.com> wrote:
Hi all,
JP2 gave us similiar results to the ones you describe. We couldn't get JP2 going so we decided it might be easier to write our own interface, by altering JP2 to suit. Apparently JP2 already has some nice debug options (printing Jtag info with pretty colours etc) We are looking to get more info from our hardware so we can determine exactly what bits/bytes the jtag is spitting out, and hence where our problem is. More of a lower-level debugger. I will report back when we have something useful. I should mention that the or1200 we are using has been hacked up a bit. regards, Luke |
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