Hi,

Now that --enable-simple works and we don't get hughe amounts of warnings from
execgen.c, I have fixed most warnings in insnset.c and execute.c.

ChangeLog:
* Fix warnings in insnset.c and execute.c

nog.

PS: The three patches I sent all depend on each other and should be applyed in
the order I sent them.
-------------- next part --------------
--- cpu/or32/execute.c 2005-01-25 08:50:59.000000000 +0100
+++ ../or1ksim-ac/cpu/or32/execute.c 2005-01-25 08:52:13.000000000 +0100
@@ -242,9 +242,9 @@
/* Sets a new SPR_SR_OV value, based on next register value */

#if SET_OV_FLAG
-#define set_ov_flag(value) (((value) & 0x80000000 ? setsprbits (SPR_SR, SPR_SR_OV, 1) : setsprbits (SPR_SR, SPR_SR_OV, 0)), value)
+#define set_ov_flag(value) if((value) & 0x80000000) setsprbits (SPR_SR, SPR_SR_OV, 1); else setsprbits (SPR_SR, SPR_SR_OV, 0)
#else
-#define set_ov_flag(value) (value)
+#define set_ov_flag(value)
#endif

/* Modified by CZ 26/05/01 for new mode execution */
@@ -431,11 +431,11 @@
if (i == 0xffffffff) return;
if (config.sim.exe_log_start if (config.sim.exe_log_marker && runtime.cpu.instructions % config.sim.exe_log_marker == 0) {
- fprintf (runtime.sim.fexe_log, "--------------------- %8i instruction ---------------------\n", runtime.cpu.instructions);
+ fprintf (runtime.sim.fexe_log, "--------------------- %8lli instruction ---------------------\n", runtime.cpu.instructions);
}
switch (config.sim.exe_log_type) {
case EXE_LOG_HARDWARE:
- fprintf (runtime.sim.fexe_log, "\nEXECUTED(%11u): %.8lx: ", runtime.cpu.instructions, i);
+ fprintf (runtime.sim.fexe_log, "\nEXECUTED(%11llu): %.8lx: ", runtime.cpu.instructions, i);
fprintf (runtime.sim.fexe_log, "%.2x%.2x", evalsim_mem8_void(i), evalsim_mem8_void(i + 1));
fprintf (runtime.sim.fexe_log, "%.2x%.2x", evalsim_mem8_void(i + 2), evalsim_mem8_void(i + 3));
for(i = 0; i @@ -490,7 +490,6 @@
void dumpreg()
{
int i;
- char temp[100];
unsigned long physical_pc;

if ((physical_pc = peek_into_itlb(iqueue[0].insn_addr))) {
--- cpu/or32/insnset.c 2005-01-25 08:50:59.000000000 +0100
+++ ../or1ksim-ac/cpu/or32/insnset.c 2005-01-25 08:44:31.000000000 +0100
@@ -291,12 +291,13 @@
set_reg32(LINK_REGNO, pc + 8);
next_delay_insn = 1;
if (config.sim.profile) {
- struct mem_entry *entry;
struct label_entry *tmp;
if (verify_memoryarea(pcdelay) && (tmp = get_label (pcdelay)))
- fprintf (runtime.sim.fprof, "+%08X %08lX %08X %s\n", runtime.sim.cycles, pc + 8, pcdelay, tmp->name);
+ fprintf (runtime.sim.fprof, "+%08llX %08lX %08lX %s\n",
+ runtime.sim.cycles, pc + 8, pcdelay, tmp->name);
else
- fprintf (runtime.sim.fprof, "+%08X %08X %08X @%08X\n", runtime.sim.cycles, pc + 8, pcdelay, pcdelay);
+ fprintf (runtime.sim.fprof, "+%08llX %08lX %08lX @%08lX\n",
+ runtime.sim.cycles, pc + 8, pcdelay, pcdelay);
}
}
INSTRUCTION (l_jalr) {
@@ -310,7 +311,7 @@
pcdelay = PARAM0;
next_delay_insn = 1;
if (config.sim.profile)
- fprintf (runtime.sim.fprof, "-%08X %08X\n", runtime.sim.cycles, pcdelay);
+ fprintf (runtime.sim.fprof, "-%08llX %08lX\n", runtime.sim.cycles, pcdelay);
}
INSTRUCTION (l_rfe) {
IFF (config.cpu.dependstats) current->func_unit = it_exception;
@@ -325,11 +326,14 @@
case NOP_NOP:
break;
case NOP_EXIT:
- PRINTF("exit(%d)\n", evalsim_reg32 (3));
- fprintf(stderr, "@reset : cycles %lld, insn #%lld\n", runtime.sim.reset_cycles, runtime.cpu.reset_instructions);
- fprintf(stderr, "@exit : cycles %lld, insn #%lld\n", runtime.sim.cycles, runtime.cpu.instructions);
- fprintf(stderr, " diff : cycles %lld, insn #%lld\n", runtime.sim.cycles,
- runtime.sim.reset_cycles, runtime.cpu.instructions - runtime.cpu.reset_instructions);
+ PRINTF("exit(%ld)\n", evalsim_reg32 (3));
+ fprintf(stderr, "@reset : cycles %lld, insn #%lld\n",
+ runtime.sim.reset_cycles, runtime.cpu.reset_instructions);
+ fprintf(stderr, "@exit : cycles %lld, insn #%lld\n", runtime.sim.cycles,
+ runtime.cpu.instructions);
+ fprintf(stderr, " diff : cycles %lld, insn #%lld\n",
+ runtime.sim.cycles - runtime.sim.reset_cycles,
+ runtime.cpu.instructions - runtime.cpu.reset_instructions);
if (config.debug.gdb_enabled)
set_stall_state (1);
else
@@ -348,10 +352,10 @@
debug(5, "simprintf %x\n", stackaddr);
break;
case NOP_REPORT:
- PRINTF("report(0x%x);\n", evalsim_reg32(3));
+ PRINTF("report(0x%lx);\n", evalsim_reg32(3));
default:
if (k >= NOP_REPORT_FIRST && k - PRINTF("report %i (0x%x);\n", k - NOP_REPORT_FIRST, evalsim_reg32(3));
+ PRINTF("report %i (0x%lx);\n", k - NOP_REPORT_FIRST, evalsim_reg32(3));
break;
}
}
@@ -490,7 +494,7 @@
hi = mfspr (SPR_MACHI);
x = PARAM0;
y = PARAM1;
- PRINTF ("[%08x,%08x]\t", (unsigned long)(x), (unsigned long)(y));
+ PRINTF ("[%08lx,%08lx]\t", (unsigned long)(x), (unsigned long)(y));
l = (ULONGEST)lo | ((LONGEST)hi l += (LONGEST) x * (LONGEST) y;

@@ -510,7 +514,7 @@
hi = mfspr (SPR_MACHI);
x = PARAM0;
y = PARAM1;
- PRINTF ("[%08x,%08x]\t", (unsigned long)(x), (unsigned long)(y));
+ PRINTF ("[%08lx,%08lx]\t", (unsigned long)(x), (unsigned long)(y));
l = (ULONGEST)lo | ((LONGEST)hi l -= x * y;

* György 'nog' Jeney (nog@sdf.lonestar.org) wrote:

I've been looking over the patches you sent. Everything looks
nice (provided it doesn't break other stuff, but we'll see that later),
just the big generate.c patch in previous email is not obvious to me.

Is it right to assume that the net effect of all the patches is:
- rD is always destination operand. the code now relies upon
this. ie. there can always be at most one destination register, when
before this wasn't neccessery (i know it's not needed for now). the gain
is faster simulator execution. (would you happen to have any esstimate?)
- cleanups/warnings elimination

If this is so i say let's commit the changes and cross our finger
it doesn't break anything. ;)

best regards,
p.

On 0, Matjaz Breskvar phoenix@opencores.org> wrote:

Could you elaborate abit more? I don't understand what your trying to say. You
mean I shouldn't need to change insnset.c? Or are you talking about the
destination operand stuff?



I have done this because I removed the eval_openrand{8,16,32} and the
instructions themselves do the set_mem{8,16,32} after my patches. Is it
forseable that there shall be multiple destination operands for some
intructions (I haven't check the vector instructions)?



For now that's basically it. I'm doing all this cleanup work to be able to bolt
my dynamic recompiler into or1ksim. In a dynamic recompiler it becomes rather
obvious the amout of stuff that has to be done to execute 1 instruction and I'm
just reduceing that number. I don't actually have any benchmarks.



Hope so...

nog.