Has any one been able to run RTL simulation with both MMU and Cache
enabled. Which tests are you running ?

I tried to run the mmu-icdc test, for which most of the functions are
disabled by default (TLB is never turned on) with comments saying that
the test would fail if IC/DC are enabled. I tried uncommenting those
and the tests goes into an infinite loop accessing flash memory
locations not present. Has anyone written a new test to test both mmu
and cache and/or modified this test.?

Thanks,

Farhan