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[or1ksim #14] Pass private data in readfunc/writefunc callbacks
by Unknown on Feb 3, 2005 |
Not available! | ||
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Hi,
This change is need to be able to eleminate loops like the following in the *_clock functions of peripherals: for ( i = 0; i if ( !(gpios.curr.ctrl & RGPIO_CTRL_ECLK) ) gpio_device_clock( &(gpios) ); ChangeLog: * Pass private data in readfunc/writefunc callbacks nog. -------------- next part -------------- --- cpu/common/abstract.c 2005-02-03 18:48:40.000000000 +0100 +++ ../or1ksim-ac/cpu/common/abstract.c 2005-02-03 18:27:13.000000000 +0100 @@ -51,13 +51,8 @@ #include "debug.h" #include "stats.h" -extern unsigned long reg[]; extern char *disassembled; -/* This is an abstract+physical memory array rather than only physical - memory array */ -static uint32_t *simmem32; - /* Pointer to memory area descriptions that are assigned to individual peripheral devices. */ struct dev_memarea *dev_list; @@ -88,8 +83,9 @@ (used also by peripheral devices like 16450 UART etc.) */ void register_memoryarea_mask(oraddr_t addr_mask, oraddr_t addr_compare, uint32_t size, unsigned granularity, unsigned mc_dev, - uint32_t (readfunc)(oraddr_t), - void (writefunc)(oraddr_t, uint32_t)) + uint32_t (readfunc)(oraddr_t, void *), + void (writefunc)(oraddr_t, uint32_t, void *), + void *dat) { struct dev_memarea **pptmp; unsigned int size_mask = bit_mask (size); @@ -136,6 +132,7 @@ (*pptmp)->log = 0; (*pptmp)->delayr = 2; (*pptmp)->delayw = 2; + (*pptmp)->priv_dat = dat; (*pptmp)->next = NULL; } @@ -144,18 +141,19 @@ fit the nearest 2^n aligment. (used also by peripheral devices like 16450 UART etc.) If mc_dev is 1, this means that this device will be checked first for match - and will be accessed in case in overlaping memory spaces. + and will be accessed in case of overlaping memory spaces. Only one device can have this set to 1 (used for memory controller) */ void register_memoryarea(oraddr_t addr, uint32_t size, unsigned granularity, unsigned mc_dev, - uint32_t (readfunc)(oraddr_t), - void (writefunc)(oraddr_t, uint32_t)) + uint32_t (readfunc)(oraddr_t, void *), + void (writefunc)(oraddr_t, uint32_t, void *), + void *dat) { unsigned int size_mask = bit_mask (size); unsigned int addr_mask = ~size_mask; register_memoryarea_mask (addr_mask, addr & addr_mask, size_mask + 1, granularity, mc_dev, - readfunc, writefunc); + readfunc, writefunc, dat); } @@ -218,17 +216,17 @@ if (verify_memoryarea(memaddr)) { switch(cur_area->granularity) { case 4: - temp = cur_area->readfunc(memaddr); + temp = cur_area->readfunc(memaddr, cur_area->priv_dat); break; case 1: - temp = cur_area->readfunc(memaddr) - temp |= cur_area->readfunc(memaddr + 1) - temp |= cur_area->readfunc(memaddr + 2) - temp |= cur_area->readfunc(memaddr + 3); + temp = cur_area->readfunc(memaddr, cur_area->priv_dat) + temp |= cur_area->readfunc(memaddr + 1, cur_area->priv_dat) + temp |= cur_area->readfunc(memaddr + 2, cur_area->priv_dat) + temp |= cur_area->readfunc(memaddr + 3, cur_area->priv_dat); break; case 2: - temp = cur_area->readfunc(memaddr) - temp |= cur_area->readfunc(memaddr + 2); + temp = cur_area->readfunc(memaddr, cur_area->priv_dat) + temp |= cur_area->readfunc(memaddr + 2, cur_area->priv_dat); break; default: /* if you add new memory granularity be sure to check the formula @@ -262,13 +260,13 @@ if (verify_memoryarea(memaddr)) { switch(cur_area->granularity) { case 1: - temp = cur_area->readfunc(memaddr) - temp |= cur_area->readfunc(memaddr + 1); + temp = cur_area->readfunc(memaddr, cur_area->priv_dat) + temp |= cur_area->readfunc(memaddr + 1, cur_area->priv_dat); if (cpu_access) runtime.sim.mem_cycles += cur_area->delayr * 2; break; case 2: - temp = cur_area->readfunc(memaddr); + temp = cur_area->readfunc(memaddr, cur_area->priv_dat); if (cpu_access) runtime.sim.mem_cycles += cur_area->delayr; break; @@ -309,7 +307,7 @@ if (verify_memoryarea(memaddr)) { switch(cur_area->granularity) { case 1: - temp = cur_area->readfunc(memaddr); + temp = cur_area->readfunc(memaddr, cur_area->priv_dat); if (cpu_access) runtime.sim.mem_cycles += cur_area->delayr; break; @@ -640,21 +638,21 @@ if (verify_memoryarea(memaddr)) { switch(cur_area->granularity) { case 4: - cur_area->writefunc(memaddr, value); + cur_area->writefunc(memaddr, value, cur_area->priv_dat); if (cpu_access) runtime.sim.mem_cycles += cur_area->delayw; break; case 1: - cur_area->writefunc(memaddr , (value >> 24) & 0xFF); - cur_area->writefunc(memaddr + 1, (value >> 16) & 0xFF); - cur_area->writefunc(memaddr + 2, (value >> 8) & 0xFF); - cur_area->writefunc(memaddr + 3, (value ) & 0xFF); + cur_area->writefunc(memaddr , (value >> 24) & 0xFF, cur_area->priv_dat); + cur_area->writefunc(memaddr + 1, (value >> 16) & 0xFF, cur_area->priv_dat); + cur_area->writefunc(memaddr + 2, (value >> 8) & 0xFF, cur_area->priv_dat); + cur_area->writefunc(memaddr + 3, (value ) & 0xFF, cur_area->priv_dat); if (cpu_access) runtime.sim.mem_cycles += cur_area->delayw * 4; break; case 2: - cur_area->writefunc(memaddr, (value >> 16) & 0xFFFF); - cur_area->writefunc(memaddr + 2, value & 0xFFFF); + cur_area->writefunc(memaddr, (value >> 16) & 0xFFFF, cur_area->priv_dat); + cur_area->writefunc(memaddr + 2, value & 0xFFFF, cur_area->priv_dat); if (cpu_access) runtime.sim.mem_cycles += cur_area->delayw * 2; break; @@ -690,13 +688,13 @@ if (verify_memoryarea(memaddr)) { switch(cur_area->granularity) { case 1: - cur_area->writefunc(memaddr, (value >> 8) & 0xFF); - cur_area->writefunc(memaddr + 1, value & 0xFF); + cur_area->writefunc(memaddr, (value >> 8) & 0xFF, cur_area->priv_dat); + cur_area->writefunc(memaddr + 1, value & 0xFF, cur_area->priv_dat); if (cpu_access) runtime.sim.mem_cycles += cur_area->delayw * 2; break; case 2: - cur_area->writefunc(memaddr, value & 0xFFFF); + cur_area->writefunc(memaddr, value & 0xFFFF, cur_area->priv_dat); if (cpu_access) runtime.sim.mem_cycles += cur_area->delayw; break; @@ -738,7 +736,7 @@ if (verify_memoryarea(memaddr)) { switch (cur_area->granularity) { case 1: - cur_area->writefunc(memaddr, value); + cur_area->writefunc(memaddr, value, cur_area->priv_dat); if (cpu_access) runtime.sim.mem_cycles += cur_area->delayw; break; @@ -992,22 +990,22 @@ } } -uint32_t simmem_read_word(oraddr_t addr) { - return simmem32[(cur_area->misc + (addr & cur_area->size_mask)) >> 2]; +uint32_t simmem_read_word(oraddr_t addr, void *priv_dat) { + return *(uint32_t *)(priv_dat + (addr & cur_area->size_mask)); } -void simmem_write_word(oraddr_t addr, uint32_t value) { - simmem32[(cur_area->misc + (addr & cur_area->size_mask)) >> 2] = value; +void simmem_write_word(oraddr_t addr, uint32_t value, void *priv_dat) { + *(uint32_t *)(priv_dat + (addr & cur_area->size_mask)) = value; } -uint32_t simmem_read_zero(oraddr_t addr) { +uint32_t simmem_read_zero(oraddr_t addr, void *dat) { if (config.sim.verbose) fprintf (stderr, "WARNING: memory read from non-read memory area 0x%" PRIxADDR".\n", addr); return 0; } -void simmem_write_null(oraddr_t addr, uint32_t value) { +void simmem_write_null(oraddr_t addr, uint32_t value, void *dat) { if (config.sim.verbose) fprintf (stderr, "WARNING: memory write to 0x%"PRIxADDR", non-write memory area (value 0x%08"PRIx32").\n", addr, value); } @@ -1016,8 +1014,6 @@ void init_memory_table () { - uint32_t memory_needed = 0; - /* If nothing was defined, use default memory block */ if (config.memory.nmemories) { int i; @@ -1028,12 +1024,19 @@ int rd = config.memory.table.delayr; int wd = config.memory.table.delayw; int ce = config.memory.table.ce; + void *mem = malloc (length); + if (config.sim.verbose) debug (1, "%"PRIxADDR" %08"PRIx32" (%"PRIi32" KB): %s (activated by CE%i; read delay = %icyc, write delay = %icyc)\n", start, length, length >> 10, type, ce, rd, wd); + + if (!mem) { + fprintf (stderr, "Failed to allocate sim memory. Aborting\n"); + exit (-1); + } + register_memoryarea(start, length, 4, 0, &simmem_read_word, - &simmem_write_word); - cur_area->misc = memory_needed; + &simmem_write_word, mem); cur_area->chip_select = ce; cur_area->valid = 1; cur_area->delayw = wd; @@ -1044,27 +1047,25 @@ config.memory.table.log); } else cur_area->log = NULL; - memory_needed += cur_area->size; } PRINTF ("\n"); } else { + void *mem = malloc (DEFAULT_MEMORY_LEN); if (config.sim.verbose) fprintf (stderr, "WARNING: Memory not defined, assuming standard configuration.\n"); + + if (!mem) { + fprintf (stderr, "Failed to allocate sim memory. Aborting\n"); + exit (-1); + } + register_memoryarea(DEFAULT_MEMORY_START, DEFAULT_MEMORY_LEN, 4, 0, - &simmem_read_word, &simmem_write_word); - cur_area->misc = memory_needed; + &simmem_read_word, &simmem_write_word, mem); cur_area->chip_select = 0; cur_area->valid = 1; cur_area->delayw = 1; cur_area->delayr = 1; cur_area->log = NULL; - memory_needed += cur_area->size; - } - - simmem32 = (uint32_t *) malloc (sizeof (uint32_t) * ((memory_needed + 3) / 4)); - if (!simmem32) { - fprintf (stderr, "Failed to allocate sim memory. Aborting\n"); - exit (-1); } } --- cpu/common/abstract.h 2005-02-03 15:00:17.000000000 +0100 +++ ../or1ksim-ac/cpu/common/abstract.h 2005-02-03 18:30:41.000000000 +0100 @@ -60,10 +60,10 @@ int valid; /* This bit reflect the memory controler valid bit */ FILE *log; /* log file if this device is to be logged, NULL otherwise */ - uint32_t (*readfunc)(oraddr_t); - void (*writefunc)(oraddr_t, uint32_t); + uint32_t (*readfunc)(oraddr_t, void *); + void (*writefunc)(oraddr_t, uint32_t, void *); /* private data */ - unsigned long misc; + void *priv_dat; }; extern struct iqueue_entry iqueue[20]; @@ -112,8 +112,9 @@ (used also by peripheral devices like 16450 UART etc.) */ void register_memoryarea_mask(oraddr_t addr_mask, oraddr_t addr_compare, uint32_t size, unsigned granularity, unsigned mc_dev, - uint32_t (readfunc)(oraddr_t), - void (writefunc)(oraddr_t, uint32_t)); + uint32_t (readfunc)(oraddr_t, void *), + void (writefunc)(oraddr_t, uint32_t, void *), + void *dat); /* Register read and write function for a memory area. Memory areas should be aligned. Memory area is rounded up to @@ -123,8 +124,9 @@ and will be accessed in case in overlaping memory spaces. Only one device can have this set to 1 (used for memory controller) */ void register_memoryarea(oraddr_t addr, uint32_t size, unsigned granularity, - unsigned mc_dev, uint32_t (readfunc)(oraddr_t), - void (writefunc)(oraddr_t, uint32_t)); + unsigned mc_dev, uint32_t (readfunc)(oraddr_t, void *), + void (writefunc)(oraddr_t, uint32_t, void *), + void *dat); /* Finds the memory area for the address and adjust the read and write delays for it. */ void adjust_rw_delay(oraddr_t memaddr, unsigned int delayr, unsigned int delayw); @@ -138,10 +140,6 @@ /* Returns 32-bit values from mem array. */ uint32_t eval_insn(oraddr_t, int *); -void simmem_write_word(oraddr_t addr, uint32_t value); - -uint32_t simmem_read_word(oraddr_t addr); - uint32_t eval_direct32(oraddr_t addr, int *breakpoint, int through_mmu, int through_dc); void set_direct32(uint32_t addr, uint32_t value, int *breakpoint, int through_mmu, int through_dc); --- debug/debug_unit.c 2005-02-03 18:48:40.000000000 +0100 +++ ../or1ksim-ac/debug/debug_unit.c 2005-02-03 18:30:28.000000000 +0100 @@ -399,8 +416,8 @@ err = JTAG_PROXY_INVALID_ADDRESS; else { // circumvent the read-only check usually done for mem accesses - // data is in host order, because that's what simmem_write_word needs - simmem_write_word(address, data); + // data is in host order, because that's what set_direct32 needs + set_direct32(address, data, NULL, 0, 0); } return err; } @@ -413,7 +430,7 @@ err = JTAG_PROXY_INVALID_ADDRESS; else { - *data=simmem_read_word(address); + *data=eval_direct32(address, NULL, 0, 0); } debug (2, "MEMREAD (%08x) = %08lx\n", address, *data); return err; diff -u -p peripheral/16450.c ../or1ksim-ac/peripheral/16450.c --- peripheral/16450.c 2005-02-03 18:48:40.000000000 +0100 +++ ../or1ksim-ac/peripheral/16450.c 2005-02-03 18:16:03.000000000 +0100 @@ -78,7 +78,7 @@ static unsigned long char_clks(int dll, } /* Set a specific UART register with value. */ -void uart_write_byte(oraddr_t addr, uint32_t value) +void uart_write_byte(oraddr_t addr, uint32_t value, void *dat) { int chipsel; @@ -153,7 +153,7 @@ void uart_write_byte(oraddr_t addr, uint } /* Read a specific UART register. */ -uint32_t uart_read_byte(oraddr_t addr) +uint32_t uart_read_byte(oraddr_t addr, void *dat) { uint8_t value = 0; int chipsel; @@ -590,7 +590,7 @@ void uart_reset() config.uarts.vapi_id = 0; } else { vapi_install_handler (config.uarts.vapi_id, uart_vapi_read); - register_memoryarea(config.uarts.baseaddr, UART_ADDR_SPACE, 1, 0, uart_read_byte, uart_write_byte); + register_memoryarea(config.uarts.baseaddr, UART_ADDR_SPACE, 1, 0, uart_read_byte, uart_write_byte, NULL); } } else if (config.uarts.channel[0]) { /* MM: Try to create stream. */ if(channels) @@ -603,7 +603,7 @@ void uart_reset() } if (config.sim.verbose) PRINTF("UART%d at 0x%.8lx uses ", i, config.uarts.baseaddr); - register_memoryarea(config.uarts.baseaddr, UART_ADDR_SPACE, 1, 0, uart_read_byte, uart_write_byte); + register_memoryarea(config.uarts.baseaddr, UART_ADDR_SPACE, 1, 0, uart_read_byte, uart_write_byte, NULL); } else { debug (0, "WARNING: UART%d has no vapi nor channel specified\n", i); continue; diff -u -p peripheral/atahost.c ../or1ksim-ac/peripheral/atahost.c --- peripheral/atahost.c 2005-02-03 18:48:40.000000000 +0100 +++ ../or1ksim-ac/peripheral/atahost.c 2005-02-03 18:36:58.000000000 +0100 @@ -83,7 +83,7 @@ void ata_reset(void) /* Connect ata_devices. */ ata_devices_init(&ata->devices, config.atas.dev_file0, config.atas.dev_file1); - register_memoryarea(ata->baseaddr, ATA_ADDR_SPACE, 4, 0, ata_read32, ata_write32); + register_memoryarea(ata->baseaddr, ATA_ADDR_SPACE, 4, 0, ata_read32, ata_write32, NULL); } /* the reset bit in the control register 'ctrl' is set, reset connect ata-devices */ @@ -124,7 +124,7 @@ int ata_find_device( oraddr_t addr, ata_ /* Read a register */ -uint32_t ata_read32( oraddr_t addr ) +uint32_t ata_read32( oraddr_t addr, void *dat ) { ata_host *ata; @@ -198,7 +198,7 @@ uint32_t ata_read32( oraddr_t addr ) /* Write a register */ -void ata_write32( oraddr_t addr, uint32_t value ) +void ata_write32( oraddr_t addr, uint32_t value, void *dat ) { ata_host *ata; diff -u -p peripheral/atahost.h ../or1ksim-ac/peripheral/atahost.h --- peripheral/atahost.h 2005-02-03 15:00:11.000000000 +0100 +++ ../or1ksim-ac/peripheral/atahost.h 2005-02-03 18:37:22.000000000 +0100 @@ -132,8 +132,8 @@ typedef struct{ /* ----- Prototypes ----- */ /* ---------------------------- */ void ata_reset(void); -uint32_t ata_read32( oraddr_t addr ); -void ata_write32( oraddr_t addr, uint32_t value ); +uint32_t ata_read32( oraddr_t addr, void *dat ); +void ata_write32( oraddr_t addr, uint32_t value, void *dat ); void ata_status(void); diff -u -p peripheral/dma.c ../or1ksim-ac/peripheral/dma.c --- peripheral/dma.c 2005-02-03 18:48:40.000000000 +0100 +++ ../or1ksim-ac/peripheral/dma.c 2005-02-03 18:32:30.000000000 +0100 @@ -44,8 +44,8 @@ /* The representation of the DMA controllers */ static struct dma_controller dmas[MAX_DMAS]; -static uint32_t dma_read32( oraddr_t addr ); -static void dma_write32( oraddr_t addr, uint32_t value ); +static uint32_t dma_read32( oraddr_t addr, void *dat ); +static void dma_write32( oraddr_t addr, uint32_t value, void *dat ); static unsigned long dma_read_ch_csr( struct dma_channel *channel ); static void dma_write_ch_csr( struct dma_channel *channel, unsigned long value ); @@ -79,7 +79,7 @@ void dma_reset() dma->ch[channel_number].regs.am0 = dma->ch[channel_number].regs.am1 = 0xFFFFFFFC; } if ( dma->baseaddr != 0 ) - register_memoryarea( dma->baseaddr, DMA_ADDR_SPACE, 4, 0, dma_read32, dma_write32); + register_memoryarea( dma->baseaddr, DMA_ADDR_SPACE, 4, 0, dma_read32, dma_write32, NULL ); } } @@ -119,7 +119,7 @@ void dma_status( void ) /* Read a register */ -uint32_t dma_read32( oraddr_t addr ) +uint32_t dma_read32( oraddr_t addr, void *dat ) { unsigned i; struct dma_controller *dma = NULL; @@ -194,7 +194,7 @@ unsigned long dma_read_ch_csr( struct dm /* Write a register */ -void dma_write32( oraddr_t addr, uint32_t value ) +void dma_write32( oraddr_t addr, uint32_t value, void *dat ) { unsigned i; struct dma_controller *dma = NULL; diff -u -p peripheral/eth.c ../or1ksim-ac/peripheral/eth.c --- peripheral/eth.c 2005-02-03 18:48:40.000000000 +0100 +++ ../or1ksim-ac/peripheral/eth.c 2005-02-03 18:33:23.000000000 +0100 @@ -56,8 +56,8 @@ static struct eth_device eths[MAX_ETHERN static void eth_reset_controller( struct eth_device *eth); static void eth_vapi_read( unsigned long id, unsigned long data); /* register interface */ -static void eth_write32( oraddr_t addr, uint32_t value ); -static uint32_t eth_read32( oraddr_t addr ); +static void eth_write32( oraddr_t addr, uint32_t value, void *dat ); +static uint32_t eth_read32( oraddr_t addr, void *dat ); /* clock */ static void eth_controller_tx_clock( struct eth_device * ); static void eth_controller_rx_clock( struct eth_device * ); @@ -517,7 +517,7 @@ void eth_reset() eth->eth_number = i; eth_reset_controller( eth ); if ( eth->baseaddr && first_time ) - register_memoryarea( eth->baseaddr, ETH_ADDR_SPACE, 4, 0, eth_read32, eth_write32 ); + register_memoryarea( eth->baseaddr, ETH_ADDR_SPACE, 4, 0, eth_read32, eth_write32, NULL ); } if ( first_time ) @@ -709,7 +709,7 @@ void eth_clock() /* Read a register */ -uint32_t eth_read32( oraddr_t addr ) +uint32_t eth_read32( oraddr_t addr, void *dat ) { struct eth_device *eth; if ( !eth_find_controller( addr, ð, &addr ) ) { @@ -759,7 +759,7 @@ uint32_t eth_read32( oraddr_t addr ) /* Write a register */ -void eth_write32( oraddr_t addr, uint32_t value ) +void eth_write32( oraddr_t addr, uint32_t value, void *dat ) { struct eth_device *eth; if ( !eth_find_controller( addr, ð, &addr ) ) { diff -u -p peripheral/fb.c ../or1ksim-ac/peripheral/fb.c --- peripheral/fb.c 2005-02-03 18:48:40.000000000 +0100 +++ ../or1ksim-ac/peripheral/fb.c 2005-02-03 18:20:00.000000000 +0100 @@ -49,7 +49,7 @@ static void change_buf_addr (oraddr_t ad } /* Write a register */ -void fb_write32 (oraddr_t addr, uint32_t value) +void fb_write32 (oraddr_t addr, uint32_t value, void *dat) { int a = (addr - config.fb.baseaddr); switch (a) { @@ -72,7 +72,7 @@ void fb_write32 (oraddr_t addr, uint32_t } /* Read a register */ -oraddr_t fb_read32 (oraddr_t addr) +oraddr_t fb_read32 (oraddr_t addr, void *dat) { int a = (addr - config.fb.baseaddr); switch (a) { @@ -290,7 +290,7 @@ void fb_reset () pal = (i if (config.fb.baseaddr) - register_memoryarea(config.fb.baseaddr, FB_PAL + 256*4, 4, 0, fb_read32, fb_write32); + register_memoryarea(config.fb.baseaddr, FB_PAL + 256*4, 4, 0, fb_read32, fb_write32, NULL); SCHED_ADD(fb_job, 0, runtime.sim.cycles + config.fb.refresh_rate); } } diff -u -p peripheral/gpio.c ../or1ksim-ac/peripheral/gpio.c --- peripheral/gpio.c 2005-02-03 18:48:40.000000000 +0100 +++ ../or1ksim-ac/peripheral/gpio.c 2005-02-03 18:33:59.000000000 +0100 @@ -38,8 +38,8 @@ static struct gpio_device gpios[MAX_GPIOS]; static void gpio_vapi_read( unsigned long id, unsigned long data ); -static uint32_t gpio_read32( oraddr_t addr ); -static void gpio_write32( oraddr_t addr, uint32_t value ); +static uint32_t gpio_read32( oraddr_t addr, void *dat ); +static void gpio_write32( oraddr_t addr, uint32_t value, void *dat ); static void gpio_external_clock( unsigned long value ); static void gpio_device_clock( struct gpio_device *gpio ); @@ -68,7 +68,7 @@ void gpio_reset( void ) gpio->irq = config.gpios.irq; /* Register memory range */ - register_memoryarea( gpio->baseaddr, GPIO_ADDR_SPACE, 4, 0, gpio_read32, gpio_write32 ); + register_memoryarea( gpio->baseaddr, GPIO_ADDR_SPACE, 4, 0, gpio_read32, gpio_write32, NULL ); /* Possibly connect to VAPI */ if ( config.gpios.base_vapi_id ) { @@ -145,7 +145,7 @@ struct gpio_device *gpio_find_vapi_devic /* Wishbone read */ -uint32_t gpio_read32( oraddr_t addr ) +uint32_t gpio_read32( oraddr_t addr, void *dat ) { struct gpio_device *gpio; if ( !gpio_find_device( addr, &gpio, &addr ) ) { @@ -167,7 +167,7 @@ uint32_t gpio_read32( oraddr_t addr ) /* Wishbone write */ -void gpio_write32( oraddr_t addr, uint32_t value ) +void gpio_write32( oraddr_t addr, uint32_t value, void *dat ) { struct gpio_device *gpio; if ( !gpio_find_device( addr, &gpio, &addr ) ) { diff -u -p peripheral/mc.c ../or1ksim-ac/peripheral/mc.c --- peripheral/mc.c 2005-02-03 18:48:40.000000000 +0100 +++ ../or1ksim-ac/peripheral/mc.c 2005-02-03 18:16:51.000000000 +0100 @@ -76,7 +76,7 @@ void set_csc_tms (int cs, unsigned long } /* Set a specific MC register with value. */ -void mc_write_word(oraddr_t addr, uint32_t value) +void mc_write_word(oraddr_t addr, uint32_t value, void *dat) { int chipsel; @@ -112,7 +112,7 @@ void mc_write_word(oraddr_t addr, uint32 } /* Read a specific MC register. */ -uint32_t mc_read_word(oraddr_t addr) +uint32_t mc_read_word(oraddr_t addr, void *dat) { uint32_t value = 0; @@ -176,7 +176,7 @@ void mc_reset() set_csc_tms (0, mc.csc[0], mc.tms[0]); - register_memoryarea(config.mc.baseaddr, MC_ADDR_SPACE, 4, 1, mc_read_word, mc_write_word); + register_memoryarea(config.mc.baseaddr, MC_ADDR_SPACE, 4, 1, mc_read_word, mc_write_word, NULL); } } diff -u -p peripheral/ps2kbd.c ../or1ksim-ac/peripheral/ps2kbd.c --- peripheral/ps2kbd.c 2005-02-03 18:48:40.000000000 +0100 +++ ../or1ksim-ac/peripheral/ps2kbd.c 2005-02-03 18:36:08.000000000 +0100 @@ -123,7 +123,7 @@ static void scan_decode (unsigned char c } /* Write a register */ -void kbd_write8 (oraddr_t addr, uint32_t value) +void kbd_write8 (oraddr_t addr, uint32_t value, void *dat) { int a = (addr - config.kbd.baseaddr); switch (a) { @@ -165,7 +165,7 @@ void kbd_write8 (oraddr_t addr, uint32_t } /* Read a register */ -uint32_t kbd_read8 (oraddr_t addr) +uint32_t kbd_read8 (oraddr_t addr, void *dat) { int a = (addr - config.kbd.baseaddr); switch (a) { @@ -261,7 +261,7 @@ void kbd_reset () kbd_buf_tail = 0; kbd_kresp = 0x0; kbd_ccmdbyte = 0x65; /* We reset into default normal operation. */ - register_memoryarea(config.kbd.baseaddr, KBD_SPACE, 1, 0, kbd_read8, kbd_write8); + register_memoryarea(config.kbd.baseaddr, KBD_SPACE, 1, 0, kbd_read8, kbd_write8, NULL); if (!(kbd_rxfs = fopen(config.kbd.rxfile, "r")) && !(kbd_rxfs = fopen(config.kbd.rxfile, "r+"))) { diff -u -p peripheral/test.c ../or1ksim-ac/peripheral/test.c --- peripheral/test.c 2005-02-03 18:48:40.000000000 +0100 +++ ../or1ksim-ac/peripheral/test.c 2005-02-03 18:37:53.000000000 +0100 @@ -15,7 +15,7 @@ uint32_t array[128]; /* Test write */ -void test_write32 (oraddr_t addr, uint32_t value) +void test_write32 (oraddr_t addr, uint32_t value, void *dat) { if (addr & 0x00000080) array[addr & 0x7f] = value; @@ -24,7 +24,7 @@ void test_write32 (oraddr_t addr, uint32 } /* Test read */ -uint32_t test_read32 (oraddr_t addr) +uint32_t test_read32 (oraddr_t addr, void *dat) { if (addr & 0x00000080) return ~array[addr & 0x7f]; @@ -42,7 +42,7 @@ void test_reset () if (config.test.enabled) { if (config.test.baseaddr) - register_memoryarea(config.test.baseaddr, 256, 4, 0, test_read32, test_write32); + register_memoryarea(config.test.baseaddr, 256, 4, 0, test_read32, test_write32, NULL); } } diff -u -p peripheral/vga.c ../or1ksim-ac/peripheral/vga.c --- peripheral/vga.c 2005-02-03 18:48:40.000000000 +0100 +++ ../or1ksim-ac/peripheral/vga.c 2005-02-03 18:19:26.000000000 +0100 @@ -46,7 +46,7 @@ static struct { /* Write a register */ -void vga_write32(oraddr_t addr, uint32_t value) +void vga_write32(oraddr_t addr, uint32_t value, void *dat) { int i, found = -1; @@ -89,7 +89,7 @@ void vga_write32(oraddr_t addr, uint32_t } /* Read a register */ -uint32_t vga_read32(oraddr_t addr) +uint32_t vga_read32(oraddr_t addr, void *dat) { int i, found = -1; @@ -257,7 +257,7 @@ void vga_reset () vga.vbindex = 0; if (config.vgas.baseaddr) - register_memoryarea(config.vgas.baseaddr, VGA_ADDR_SPACE, 4, 0, vga_read32, vga_write32); + register_memoryarea(config.vgas.baseaddr, VGA_ADDR_SPACE, 4, 0, vga_read32, vga_write32, NULL); SCHED_ADD(vga_job, i, runtime.sim.cycles + config.vgas.refresh_rate); } } |
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[or1ksim #14] Pass private data in readfunc/writefunc callbacks
by Unknown on Feb 5, 2005 |
Not available! | ||
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* György 'nog' Jeney (nog@sdf.lonestar.org) wrote:
Hi,
This change is need to be able to eleminate loops like the following in the *_clock functions of peripherals: ok to commit after tag. regards, p. |
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