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Simulation Help? Tests for Cache Memory
by Unknown on Feb 8, 2005 |
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Hi All,
Can you please point me to a test, which tests cache memory (both instruction and data). ? I tried to run the mmu-icdc test, for which most of the functions are disabled by default (TLB is never turned on) with comments saying that the test would fail if IC/DC are enabled. I tried uncommenting those and the tests goes into an infinite loop accessing flash memory locations not present. Has anyone written a new test to test both mmu and cache and/or modified this test.? Thanks, Farhan |
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